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SAB82525H Datasheet(PDF) 32 Page - Infineon Technologies AG |
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SAB82525H Datasheet(HTML) 32 Page - Infineon Technologies AG |
32 / 126 page Semiconductor Group 32 82525 82526 82525 82526 SAB SAB SAF SAF Examples The interaction between the HSCX and the CPU during the transmission and reception of I-frames is illustrated in figure 12, the flow control with RR/RNR during the reception of I-frames in figure 13, and during the transmission of I-frames in figure 14. Both the sequence of the poll cycle and protocol errors are illustrated in figure 15. Figure 12 Transmission/Reception I-Frames Figure 13 Flow Control/Reception ITD00232 RME RME WFA Transmit with Frame Ι Confirm Ι Frame ALLS ALLS WFA Reception Frame Ι Transmit Frame Ι RR (1) (0.0) Ι RR (1) Ι (0.1) (1.1) Ι (1.2) Ι RR (2) XPR XPR ITD00234 RNR RME XRNR RNR (0) RR (0.0) Ι RR (0) p = 1 RR (0) f = 1 RR (0) p = 1 RR (0) f = 1 Ι (0.0) RR (1) |
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