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PLB2800 Datasheet(PDF) 1 Page - Infineon Technologies AG |
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PLB2800 Datasheet(HTML) 1 Page - Infineon Technologies AG |
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1 / 2 page  Never stop thinking. P RODUCT B RIEF Purple 48FE+2GbE/8GbE L2+ Configurable Ethernet Switch-on-a-Chip PLB 2800 Infineon's Purple (PLB 2800) is a highly integrated and configurable Layer 2+ SoC (Switch-on-a-Chip). It extends Infineon's Layer 2 Ethernet switch family of products for higher integration, and more advanced traffic management. The Purple’s versa- tile configuration and stacking options permit a variety of system topologies designed to increase the deployment of Ethernet access applications. The Purple features a large on-chip packet buffer and address tables. With the addition of an on-chip 64-bit MIPS CPU, the need for an external memory and controller is eliminated. Advanced security and Quality of Service (QoS) features are guaranteed using extensive VLAN management capabilities and port-based security for guarded and secure handling of traffic flows. The Purple supports seven different configura- tions, ranging from eight GbE ports up to 48FE + 2GbE. Applications ■ Ethernet access switch for IP-DSLAM/DLC/MDU/MTU ■ High port count workgroup switch ■ GbE aggregator Ethernet Switch ■ Cellular base stations ■ Packet over SONET/SDH systems Features ■ 21 Gbit/s 12 million packets/ second switching engine for solid L2+ wirespeed switching performance ■ Embedded 64-bit MIPS 5Kc CPU ■ On-chip DRAM, SRAM ■ Stackable with up to 16 Purple switches with complete stack management ■ Four Class of Service (CoS) queues per port ■ Strict priority and Weighted-Fair- Queuing (WFQ) packet scheduling ■ Advanced buffer control ■ Broadcast and multicast storm control ■ Multicast support for up to 256 multicast groups ■ Port based flow control ■ Per-flow token bucket policing ■ Per-queue rate shaping ■ Port, tag and flow-based VLANs ■ Stacked VLAN support ■ Port-based security ■ Intrusion detection ■ eCPU switch management with Bus mastering capabilities, flow- based accounting and RMON support ■ Hardware assistance for protocols such as STP, GVRP and IGMP and Snooping Interfaces ■ SMII V1.2/V2.1 for FE ports ■ (R)GMII/TBI/MII for GE ports ■ 32-Bit, 66 MHz PCI or generic host bus with DMA support ■ I 2C Interface for configuration EEPROM, optional low-cost CPU ■ PC-133 SDRAM interface for external CPU DRAM ■ EJTAG Interface for testing ■ General purpose timer and I/Os Standards Supported ■ Supports a wide variety of IEEE 802.xx protocols ■ IETF RFCs 1155–1157 SNMP ■ IETF RFCs 1213, 1643, 1493 ■ IETF RFC 1757 RMON Physical Characteristics ■ P-BGA-388-2 package ■ Core logic operates at 1.8 V |
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