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SN74LV125APWRG4 Datasheet(PDF) 4 Page - Texas Instruments |
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SN74LV125APWRG4 Datasheet(HTML) 4 Page - Texas Instruments |
4 / 29 page 4 SN74LV125A SCES124N – DECEMBER 1997 – REVISED JANUARY 2016 www.ti.com Product Folder Links: SN74LV125A Submit Documentation Feedback Copyright © 1997–2016, Texas Instruments Incorporated (1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) The input and output negative-voltage ratings may be exceeded if the input and output current ratings are observed. (3) This value is limited to 5.5-V maximum. 7 Specifications 7.1 Absolute Maximum Ratings (1) over operating free-air temperature range (unless otherwise noted) MIN MAX UNIT VCC Supply voltage –0.5 7 V VI Input voltage range(2) –0.5 7 V VO Voltage range applied to any output in the high-impedance or power-off state (2) –0.5 7 V VO Output voltage range(2)(3) –0.5 VCC + 0.5 V IIK Input clamp current VI < 0 –20 mA IOK Output clamp current VO < 0 –50 mA IO Continuous output current VO = 0 to VCC ±35 mA Continuous current through VCC or GND ±70 mA Tj Junction temperature 150 °C Tstg Storage temperature –65 150 °C (1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. (2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. 7.2 ESD Ratings MAX UNIT V(ESD) Electrostatic discharge Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins(1) 4000 V Charged device model (CDM), per JEDEC specification JESD22-C101, all pins(2) 2000 Machine Model (MM) 200 |
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