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SN74LV244ADBRE4 Datasheet(PDF) 1 Page - Texas Instruments |
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SN74LV244ADBRE4 Datasheet(HTML) 1 Page - Texas Instruments |
1 / 30 page 1 2 18 1Y1 1OE 1A1 4 16 1Y2 1A2 6 14 1Y3 1A3 8 12 1Y4 1A4 19 11 9 2Y1 2OE 2A1 13 7 2Y2 2A2 15 5 2Y3 2A3 17 3 2Y4 2A4 Product Folder Sample & Buy Technical Documents Tools & Software Support & Community Reference Design SN74LV244A SCLS383N – SEPTEMBER 1997 – REVISED OCTOBER 2015 SN74LV244A Octal Buffers and Drivers With 3-State Outputs 1 Features 2 Applications 1 • 2-V to 5.5-V VCC Operation • Servers and Network Switches • Max tpd of 6.5 ns at 5 V • LED Displays • Typical VOLP (Output Ground Bounce) • Telecom Infrastructure <0.8 V at VCC = 3.3 V, TA = 25°C • Motor-Drive Control Boards • Typical VOHV (Output VOH Undershoot) 3 Description >2.3 V at VCC = 3.3 V, TA = 25°C The SN74LV244A octal buffers and line drivers are • Support Mixed-Mode Voltage Operation on All designed for 2-V to 5.5-V VCC operation. Ports The SN74LV244A devices are designed specifically • Ioff Supports Partial-Power-Down Mode Operation to improve both performance and density of the 3- • Latch-Up Performance Exceeds 250-mA Per state memory address drivers, clock drivers, and bus- JESD 17 oriented receivers and transmitters. These devices • ESD Protection Exceeds JESD 22 are organized as two 4-bit line drivers with separate output-enable (OE) inputs. – 2000-V Human-Body Model (A114-A) – 200-V Machine Model (A115-A) Device Information – 1000-V Charged-Device Model (C101) PART NUMBER PACKAGE (PIN) BODY SIZE SN74LV244ADGV TVSOP (20) 5.00 mm × 4.40 mm SN74LV244ADW SOIC (20) 12.80 mm × 7.50 mm SN74LV244ANS SOP (20) 12.60 mm × 5.30 mm SN74LV244APW TSSOP (20) 6.50 mm × 4.40 mm SN74LV244ARGY VQFN (20) 4.50 mm × 3.50 mm Logic Diagram (Positive Logic) 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. |
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