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SN74LV244ADBR Datasheet(PDF) 10 Page - Texas Instruments |
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SN74LV244ADBR Datasheet(HTML) 10 Page - Texas Instruments |
10 / 30 page 1 2 18 1Y1 1OE 1A1 4 16 1Y2 1A2 6 14 1Y3 1A3 8 12 1Y4 1A4 19 11 9 2Y1 2OE 2A1 13 7 2Y2 2A2 15 5 2Y3 2A3 17 3 2Y4 2A4 SN74LV244A SCLS383N – SEPTEMBER 1997 – REVISED OCTOBER 2015 www.ti.com 8 Detailed Description 8.1 Overview The SN74LV244 devices are octal buffers grouped in fours, with each group having its own enable pin. The LV family supports high current drive of about 16 mA, thus making it suitable for driving digital signals over longer board lengths. This device is generally used to buffer or incorporate delays between the signals between two microcontroller or peripheral devices. 8.2 Functional Block Diagram 8.3 Feature Description The SN74LV244A, a part of LV family, can work over a wide voltage range from 2 V to 5.5 V. The device features a very low propagation delay of about 6.5 ns when enabled for 5-V VCC, which allows the device to be used for high-speed applications. The device supports a partial-power-down mode for low quiescent current application, thus making it the buffer of choice in power-efficient circuits. The Ioff circuitry also disables the outputs, preventing damaging current backflow through the devices when they are powered down. 8.4 Device Functional Modes The SN74LV244A devices are organized as two 4-bit line drivers with separate output-enable (OE) inputs. When OE is low, the device passes data from the A inputs to the Y outputs. When OE is high, the outputs are in the high-impedance state. To ensure the high-impedance state during power up or power down, OE must be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. Table 1. Function Table INPUTS OUTPUTS OE A Y L L L L H H H X Z 10 Submit Documentation Feedback Copyright © 1997–2015, Texas Instruments Incorporated Product Folder Links: SN74LV244A |
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