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74AVCH2T45DCTRE4 Datasheet(PDF) 14 Page - Texas Instruments |
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74AVCH2T45DCTRE4 Datasheet(HTML) 14 Page - Texas Instruments |
14 / 31 page ![]() B1 DIR 5 7 A1 2 VCCA VCCB B2 6 A2 3 1 8 VCCA VCCB GND 4 VCCA VCCB SN74AVCH2T45 SCES582H – JULY 2004 – REVISED APRIL 2015 www.ti.com 9 Detailed Description 9.1 Overview This dual-bit non-inverting bus transceiver uses two separate configurable power-supply rails. The A port is designed to track VCCA and accepts any supply voltage from 1.2 V to 3.6 V. The B port is designed to track VCCB and accepts any supply voltage from 1.2 V to 3.6 V. This allows for universal low-voltage bidirectional translation and level-shifting between any of the 1.2 V, 1.5 V, 1.8 V, 2.5 V, and 3.3 V voltage nodes. The SN74AVCH2T45 is designed for asynchronous communication between two data buses. The logic levels of the direction-control (DIR pin) input activate either the B-port outputs or the A-port outputs. The device transmits data from the A bus to the B bus when the B-port outputs are activated and from the B bus to the A bus when the A-port outputs are activated. The SN74AVCH2T45 features active bus-hold circuitry. The DIR input is powered by supply voltage from VCCA. This device is fully specified for partial-power-down applications using off output current (Ioff). The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. The VCC isolation feature ensures that if either VCC input is at GND, both ports are put in a high-impedance state. This will prevent a false high or low logic being presented at the output. NanoFree package technology is a major breakthrough in IC packaging concepts, using the die as the package. 9.2 Functional Block Diagram 14 Submit Documentation Feedback Copyright © 2004–2015, Texas Instruments Incorporated Product Folder Links: SN74AVCH2T45 |
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