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74AVCH2T45DCTRE4 Datasheet(PDF) 1 Page - Texas Instruments

Part No. 74AVCH2T45DCTRE4
Description  2-Supply, Bus Transceiver with Configurable Level-Shifting
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Maker  TI1 [Texas Instruments]
Homepage  http://www.ti.com
Logo TI1 - Texas Instruments

74AVCH2T45DCTRE4 Datasheet(HTML) 1 Page - Texas Instruments

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B1
DIR
5
7
A1
2
VCCA
VCCB
B2
6
A2
3
1
8
VCCA
VCCB
GND
4
VCCA
VCCB
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SN74AVCH2T45
SCES582H – JULY 2004 – REVISED APRIL 2015
SN74AVCH2T45 2-Bit, 2-Supply, Bus Transceiver with Configurable Level-Shifting and
Translation and 3-State Outputs
1 Features
3 Description
This 2-bit non-inverting bus transceiver uses two
1
Available in the Texas Instruments NanoFree™
separate configurable power-supply rails. The A ports
Package
are designed to track VCCA and accepts any supply
VCC Isolation
voltage from 1.2 V to 3.6 V. The B ports are designed
2-Rail Design
to track VCCB and accepts any supply voltage from
1.2 V to 3.6 V. This allows for universal low-voltage
I/Os are 4.6 V Tolerant
bidirectional translation and level-shifting between
Partial Power-Down-Mode Operation
any of the 1.2 V, 1.5 V, 1.8 V, 2.5 V, and 3.3 V
Bus Hold on Data Inputs
voltage nodes.
Maximum Data Rates
The SN74AVCH2T45 is designed for asynchronous
500 Mbps (1.8 V to 3.3 V)
communication between two data buses. The logic
levels of the direction-control (DIR pin) input activate
320 Mbps (< 1.8 V to 3.3 V)
either the B-port outputs or the A-port outputs. The
320 Mbps (Level-Shifting to 2.5 V or 1.8 V)
device transmits data from the A bus to the B bus
280 Mbps (Level-Shifting to 1.5 V)
when the B-port outputs are activated and from the B
bus to the A bus when the A-port outputs are
240 Mbps (Level-Shifting to 1.2 V)
activated. The SN74AVCH2T45 features active bus-
Latch-Up Performance Exceeds 100 mA Per
hold circuitry, which holds unused or un-driven inputs
JESD 78, Class II
at a valid logic state. TI does not recommend using
ESD Protection Exceeds JESD 22
pull-up or pull-down resistors with the bus-hold
circuitry.
2 Applications
Device Information(1)
Smartphone
PART NUMBER
PACKAGE
BODY SIZE (NOM)
Servers
SSOP (8)
2.95 mm × 2.80 mm
Desktop PCs and Notebooks
SN74AVCH2T45
VSSOP (8)
2.30 mm × 2.00 mm
Other Portable Devices
DSBGA (8)
1.89 mm × 0.89 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
Logic Diagram (Positive Logic)
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.


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