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74AVCH2T45DCTRE4 Datasheet(PDF) 18 Page - Texas Instruments |
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74AVCH2T45DCTRE4 Datasheet(HTML) 18 Page - Texas Instruments |
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18 / 31 page 
V CCA V CCA V CCB SYSTEM-1 SYSTEM-2 1 2 3 4 8 7 6 5 DIR CTRL IO-1 V CCB IO-2 VCCB B1 B2 DIR VCCA A2 A1 GND Pull-up/Pull-down or Bus Hold Pull-up/Pull-down or Bus Hold SN74AVCH2T45 SCES582H – JULY 2004 – REVISED APRIL 2015 www.ti.com 10.2.2 Bidirectional Logic Level-Shifting Application Figure 10 shows the SN74AVCH2T45 used in a bidirectional logic level-shifting application. Because the SN74AVCH2T45 does not have an output-enable (OE) pin, system designers should take precautions to avoid bus contention between SYSTEM-1 and SYSTEM-2 when changing directions. Figure 10. Bidirectional Logic Level-Shifting Application 10.2.2.1 Design Requirements This device uses drivers which are enabled depending on the state of the DIR pin. The designer must know the intended flow of data and take care not to violate any of the high or low logic levels. Active bus-hold circuitry holds unused or un-driven inputs at a valid logic state. TI does not recommend using pull-up or pull-down resistors with the bus-hold circuitry. 10.2.2.2 Detailed Design Procedure Table 3 lists a sequence that shows data transmission from SYSTEM-1 to SYSTEM-2 and then from SYSTEM-2 to SYSTEM-1. Table 3. Data Transmission Sequence STATE DIR CTRL IO-1 IO-2 DESCRIPTION 1 H Output Input SYSTEM-1 data to SYSTEM-2 SYSTEM-2 is getting ready to send data to SYSTEM-1. IO-1 and IO-2 are 2 H Hi-Z Hi-Z disabled. The bus-line state depends on pull-up or pull-down.(1) DIR bit is flipped. IO-1 and IO-2 still are disabled. 3 L Hi-Z Hi-Z The bus-line state depends on pull-up or pull-down.(1) 4 L Input Output SYSTEM-2 data to SYSTEM-1 (1) SYSTEM-1 and SYSTEM-2 must use the same conditions, i.e., both pullup or both pulldown. 18 Submit Documentation Feedback Copyright © 2004–2015, Texas Instruments Incorporated Product Folder Links: SN74AVCH2T45 |
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