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74AVCH2T45DCTRE4 Datasheet(PDF) 16 Page - Texas Instruments |
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74AVCH2T45DCTRE4 Datasheet(HTML) 16 Page - Texas Instruments |
16 / 31 page ![]() V CCA V CCA V CCB SYSTEM-1 SYSTEM-2 V CCA 1 2 3 4 8 7 6 5 V CCB V CCB VCCB B1 B2 DIR VCCA A2 A1 GND SN74AVCH2T45 SCES582H – JULY 2004 – REVISED APRIL 2015 www.ti.com 10 Application and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality. 10.1 Application Information The SN74AVCH2T45 is used to shift IO voltage levels from one voltage domain to another. Each bus (bus A and bus B) have independent power supplies, and a direction pin is used to control the direction of data flow. 10.2 Typical Applications 10.2.1 Unidirectional Logic Level-Shifting Application Figure 8 is an example of the SN74AVCH2T45 circuit used in a unidirectional logic level-shifting application. Figure 8. Unidirectional Logic Level-Shifting Application 10.2.1.1 Design Requirements This device uses drivers which are enabled depending on the state of the DIR pin. The designer must know the intended flow of data and take care not to violate any of the high or low logic levels. Active bus-hold circuitry holds unused or un-driven inputs at a valid logic state. TI does not recommend using pull-up or pull-down resistors with the bus-hold circuitry. 10.2.1.2 Detailed Design Procedure Table 2 lists the pins and pin descriptions of the SN74AVCH2T45 connections with SYSTEM-1 and SYSTEM-2. 16 Submit Documentation Feedback Copyright © 2004–2015, Texas Instruments Incorporated Product Folder Links: SN74AVCH2T45 |
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