PEB20534 datasheet(88/439 Pages) INFINEON

Part #	PEB20534

Description	DMA Supported Serial Communication Controller with 4 Channels

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Manufacturer	INFINEON [Infineon Technologies AG]

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PEB 20534

PEF 20534

DMA Controller and Central FIFOs

Data Sheet

88

2000-05-30

0034

H

r/w

CPU

00000000

H

FIFOCR4:

FIFO Control Register 4

Bit-Fields

Pos.

Name

Default

Description

31..24,

23..16,

15..8,

7..0

TFF

THRESH0,

TFF

THRESH1,

TFF

THRESH2,

TFF

THRESH3,

0,

0

Transmit FIFO Forward Threshold i

(i=0..3)

Transmit FIFO Forward Threshold for

corresponding channel i in DWORDs. A

watermark is calculated by:

watermark = TFFTHRESHi

As soon as the number of valid data

belonging to a new frame in the transmit

FIFO is greater than the watermark, the

DMAC will provide transmit data to the

corresponding

SCC.

Once

having

started a frame the DMAC will ignore this

threshold providing all available data to

the SCC. Threshold operation starts

again with the beginning of a new frame.

Frames shorter than the threshold will be

transferred as soon as a frame end

indication is detected by the DMAC.

Note: The maximum allowed Transmit

FIFO Forward Threshold is:

TFFTHRESHi = (TFSIZEi * 4) - 1

Note: Programming

TFFTHRESHi

to

zero will disable the threshold

causing the DMAC to transfer all

data immediately. This may be

useful with non packet oriented

data e.g. in ASYNC

protocol

mode.

Table 16

Central FIFO Control Registers (cont’d)

Offset

Addr.

Access

Type

Controlled

by

Reset

Value

Register Name

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