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PEB2084 Datasheet(PDF) 73 Page - Infineon Technologies AG |
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PEB2084 Datasheet(HTML) 73 Page - Infineon Technologies AG |
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73 / 269 page  PEB 2055 PEF 2055 Detailed Register Description Semiconductor Group 73 4.2.5.3 Monitor/Feature Control Channel FIFO (MFFIFO) Access in demultiplexed µP-interface mode: read/write address: BH OMDR:RBS = 0 Access in multiplexed µP-interface mode: read/write address: 16H Reset value: empty The 16-byte bi-directional MFFIFO provides intermediate storage for data bytes to be transmitted or received over the monitor or feature control channel. MFD7..0 MF Data bits 7..0; MFD7 (MSB) is the first bit to be sent over the serial CFI, MFD0 (LSB) the last. Note: The byte n + 1 of an n-byte transmit message in monitor channel is not defined. 4.2.6 Status/Control Registers 4.2.6.1 Signaling FIFO (CIFIFO) Access in demultiplexed µP-interface mode: read address: CH OMDR:RBS = 0 Access in multiplexed µP-interface mode: read address: 18H Reset value: 0xxxxxxxB The 9 byte deep CIFIFO stores the addresses of CFI time slots in which a C/I and/or a SIG value change has taken place. This address information can then be used to read the actual C/I or SIG value from the control memory. SBV Signaling Byte Valid. 0… the SAD6..0 bits are invalid. 1… the SAD6..0 bits indicate a valid subscriber address. The polarity of SBV is chosen such that the whole 8 bits of the CIFIFO can be copied to the MAAR register in order to read the upstream C/I or SIG value from the control memory. SAD6..0 Subscriber Address bits 6..0; The CM address which corresponds to the CFI time slot where a C/I or SIG value change has taken place is encoded in these bits. For C/I channels SAD6..0 point to an even CM-address (C/I value), for SIG channels SAD6..0 point to an odd CM-address (stable SIG value). bit 7 bit 0 MFD7 MFD6 MFD5 MFD4 MFD3 MFD2 MFD1 MFD0 bit 7 bit 0 SBV SAD6 SAD5 SAD4 SAD3 SAD2 SAD1 SAD0 |
Similar Part No. - PEB2084 |
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