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HYE18P32161AC Datasheet(PDF) 8 Page - Infineon Technologies AG |
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HYE18P32161AC Datasheet(HTML) 8 Page - Infineon Technologies AG |
8 / 33 page Data Sheet 8 V2.0, 2003-12-16 32M Asynchronous/Page CellularRAM CellularRAM HYE18P32161AC-70/L70 HYE18P32161AC-85/L85 1Overview 1.1 Features • High density (1T1C-cell) Synchronous 32-Mbit Pseudo-Static RAM • Designed for cell phone applications (CellularRAM) • Functional-compatible to conventional low power asynchronous SRAM devices • Organization 2M × 16 • Refresh-free operation • 1.8 V single power supply ( V DD and VDDQ) • Support of 2.5V and 3.0V I/O voltage options ( V DDQ) • Low power optimized design – I STANDBY = 90 µA for L-part and 120 µA for standard part (32M), data retention mode – I DPD = < 25 µA (32M), non-data retention mode • Low power features (partly adopted from the JEDEC standardized low power SDRAM specifications) – Temperature Compensated Self-Refresh (TCSR) – Partial Array Self-Refresh (PASR) – Deep Power Down Mode (DPD) • 70 ns random access cycle time, 20 ns page mode (read only) cycle time • Byte read/write control by UB/LB • Wireless operating temperature range from -25 °C to +85 °C • P-VFBGA-48 chip-scale package (8 × 6 ball grid) Table 1 Product Selection HYE18P32161AC -70 -85 L70 L85 Min. Random Cycle time (tRC) 70ns 85ns 70ns 85ns Min. Page Read Cycle time (tPC) 20ns 25ns 20ns 25ns Operating current (Icc1) 20mA 17mA 20mA 17mA Stand-by current (Icc2) 120uA 90uA Ordering Info (Contact Factory) H Y E 18 P 321 6 1 A C Chip Scale Package Design Revision number Device Type 32M (x16 Org) V DD = 1.8 V typ. PSRAM product 1: Asynch/Page (48-ball) Extended Temp. part |
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