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ISO7221CDG4 Datasheet(PDF) 20 Page - Texas Instruments

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Part # ISO7221CDG4
Description  Dual Channel Digital Isolators
Download  35 Pages
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

ISO7221CDG4 Datasheet(HTML) 20 Page - Texas Instruments

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ISO7220A, ISO7220B, ISO7220C, ISO7220M
ISO7221A, ISO7221B, ISO7221C, ISO7221M
SLLS755N – JULY 2006 – REVISED SEPTEMBER 2015
www.ti.com
8.3 Feature Description
MAX SIGNALING
INPUT
CHANNEL
PRODUCT
RATE
THRESHOLD
DIRECTION
≈ 1.5 V (TTL)
ISO7220A
1 Mbps
(CMOS compatible)
≈ 1.5 V (TTL)
ISO7220B
5 Mbps
(CMOS compatible
Same direction
≈ 1.5 V (TTL)
ISO7220C
25 Mbps
(CMOS compatible)
ISO7220M
150 Mbps
VCC/ 2 (CMOS)
≈ 1.5 V (TTL)
ISO7221A
1 Mbps
(CMOS compatible)
≈ 1.5 V (TTL)
ISO7221B
5 Mbps
(CMOS compatible)
Opposite directions
≈ 1.5 V (TTL)
ISO7221C
25 Mbps
(CMOS compatible)
ISO7221M
150 Mbps
VCC/ 2 (CMOS)
8.3.1 DIN V VDE V 0884-10 (VDE V 0884-10):2006-12 Insulation Characteristics(1)
PARAMETER
TEST CONDITIONS
SPECIFICATION
UNIT
Maximum working insulation
VIORM
560
voltage
After Input/Output safety test subgroup 2/3,
VPR = VIORM × 1.2, t = 10 s,
672
Partial discharge < 5 pC
Method a, After environment tests subgroup 1,
VPR
Input to output test voltage
VPR = VIORM × 1.6, t = 10 s,
896
VPK
Partial discharge < 5 pC
Method b1, VPR = VIORM × 1.875,
100% Production test with t = 1 s,
1050
Partial discharge < 5 pC
VTEST = VIOTM
VIOTM
Transient overvoltage
t = 60 s (qualification)
4000
t = 1 s (100% production)
RS
Insulation resistance
VIO = 500 V at TS = 150°C
>109
Pollution degree
2
(1)
Climatic Classification 40/125/21
NOTE
Creepage and clearance requirements should be applied according to the specific
equipment isolation standards of an application. Take care to maintain the creepage and
clearance distance of a board design to ensure that the mounting pads of the isolator on
the printed circuit board do not reduce this distance.
Creepage and clearance on a printed circuit board become equal according to the
measurement techniques shown in the Isolation Glossary in the Related Documentation
section. Techniques such as inserting grooves, ribs, or both on a printed circuit board are
used to help increase these specifications.
8.3.2 IEC Package Characteristics
PARAMETER
TEST CONDITIONS
MIN
TYP MAX
UNIT
L(I01)
Minimum air gap (Clearance)(1)
Shortest pin-to-pin distance through air
4
mm
SOIC-8
Minimum external tracking (Creepage)
Shortest pin-to-pin distance across the
L(I02)
4
mm
(1)
package surface
(1)
Per JEDEC package dimensions.
20
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Copyright © 2006–2015, Texas Instruments Incorporated
Product Folder Links: ISO7220A ISO7220B ISO7220C ISO7220M ISO7221A ISO7221B ISO7221C ISO7221M


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