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TUSB4041I-Q1 Datasheet(PDF) 7 Page - Texas Instruments |
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TUSB4041I-Q1 Datasheet(HTML) 7 Page - Texas Instruments |
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7 / 44 page  7 TUSB4041I-Q1 www.ti.com SLLSEK4B – JULY 2015 – REVISED JANUARY 2016 Product Folder Links: TUSB4041I-Q1 Submit Documentation Feedback Copyright © 2015–2016, Texas Instruments Incorporated Pin Functions (continued) PIN I/O(1) TYPE(1) DESCRIPTION NAME NO. TEST AND MISCELLANEOUS SIGNALS AUTOENz/ HS_SUSPEND 13 I/O PU Automatic charge mode enable/HS suspend status The value of the pin is sampled at the deassertion of reset to determine if automatic mode is enabled as follows: 0 = Automatic mode is enabled on ports that are enabled for battery charging when the hub is unconnected. Note that CDP is not supported on port 1 when operating in automatic mode. 1 = Automatic mode is disabled. This value is also used to set the autoEnz bit in the Battery Charging Support Register. After reset, this signal indicates the high-speed USB Suspend status of the upstream port if enabled through the Additional Feature Configuration Register. When enabled, a value of 1 indicates the connection is suspended. FULLPWRMGMTz/ SMBA1 8 I/O PD Full power management enable/SMBus address bit 1 The value of the pin is sampled at the deassertion of reset to set the power switch control follows: 0 = Power switching and overcurrent inputs supported 1 = Power switching and overcurrent inputs not supported Full power management is the ability to control power to the downstream ports of the TUSB4041I-Q1 device using PWRCTL[4:1]/BATEN[4:1]. When SMBus mode is enabled using SMBUSz, this pin sets the value of the SMBus slave address bit 1. This pin can be left unconnected if full power management and SMBus are not implemented. After reset, this signal is driven low by the TUSB4041I-Q1. Because of this behavior, TI recommends not to tie directly to supply, but instead pull up or pull down using an external resistor. Note: Power switching must be supported for battery charging applications. GANGED/SMBA2/ HS_UP 10 I/O PD Ganged operation enable/SMBus address bit 2/HS connection status upstream port The value of the pin is sampled at the deassertion of reset to set the power switch and overcurrent detection mode as follows: 0 = Individual power control supported when power switching is enabled 1 = Power control gangs supported when power switching is enabled When SMBus mode is enabled using SMBUSz, this pin sets the value of the SMBus slave address bit 2. After reset, this signal indicates the high-speed USB connection status of the upstream port if enabled through the Additional Feature Configuration Register. When enabled, a value of 1 indicates the upstream port is connected to a high-speed USB capable port. Note: Individual power control must be enabled for battery charging applications. PWRCTL_POL 9 I/O PU Power control polarity. The value of the pin is sampled at the deassertion of reset to set the polarity of PWRCTL[4:1]. 0 = PWRCTL polarity is active low 1 = PWRCTL polarity is active high RSVD 23, 24, 26, 27, 35, 36, 38, 39, 43, 44, 46, 47, 51, 52, 54, 55, 58, 59, 61, 62 I/O Reserved. For internal use only and leave unconnected on the PCB. |
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