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FOA3251B1 Datasheet(PDF) 9 Page - Infineon Technologies AG

Part No. FOA3251B1
Description  High Speed Clock and Data Recovery for Fiber Optic Applications
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Manufacturer  INFINEON [Infineon Technologies AG]
Direct Link  http://www.infineon.com
Logo INFINEON - Infineon Technologies AG

FOA3251B1 Datasheet(HTML) 9 Page - Infineon Technologies AG

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FOA3251B1
S1028C1
Functional Description
Data Sheet
9
V1.0, 1999-08
2.3
Functional Block Diagram
Figure 2
Block Diagram
2.4
Functional Block Description
The clock and data recovery block (CDR) consists of a bang-bang phase detector (PD),
a frequency window detector (FWD) and a VCO. The PD also provides a kind of
statistical BER signal that is used to generate a loss of signal (LOS) signal. The FWD
moves the VCO in the right frequency range. The frequency window is about 10000 ppm
of the center frequency. When the frequency is out of range a los of lock signal (LOL) is
generated. The center frequency is given by a reference clock signal which is (signal
frequency)/128. The VCO is a 3 stage ring oscillator type.
The clock multiplier unit (CMU) consist of a phase frequency detector (PFD), a VCO and
a retiming Flip-Flop. The PFD is type 4 phase and frequency detector. The low pass
filtered PFD signal as a function of the phase error is shown in Figure 3.
ITB11417
FWD
VCO
PD
Loop
Filter
CDR
D
C
PFD
Loop
Filter
VCO
CMU
Delay Line
DATA
REFCLK
TRDATA
TRCLK
Recovered
DATA
Recovered
Clock
LOS
LOL
Postamp


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