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RHFLVDS32AK1 Datasheet(PDF) 1 Page - STMicroelectronics |
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RHFLVDS32AK1 Datasheet(HTML) 1 Page - STMicroelectronics |
1 / 15 page This is information on a product in full production. March 2015 DocID025371 Rev 3 1/15 RHFLVDS32A Rad-hard quad LVDS receivers Datasheet - production data Features LVDS input CMOS output ANSI TIA/EIA-644 compliant 400 Mbps (200 MHz) Cold spare on all pins Fail-safe function 3.3 V operating power supply 4.8 V absolute rating Power consumption: 43 mW at 3.3 V Hermetic package Large input common mode: -4 V to +5 V Guaranteed up to 300 krad TID SEL immune up to 135 MeV.cm²/mg SET/SEU immune up to 32 MeV.cm²/mg Description The RHFLVDS32A is a quad, low-voltage differential signaling (LVDS) receiver specifically designed, packaged and qualified for use in aerospace environments in a low-power and fast data transmission standard. The circuit features an internal fail-safe function to ensure a known state in case of an input short circuit or a floating input. All pins have cold spare buffers to ensure they are in high impedance when VCC is tied to GND. Designed on ST's proprietary CMOS process with specific mitigation techniques, the RHFLVDS32A achieves “best in the class” for hardness to total ionisation dose and heavy ions. The RHFLVDS32A can operate over a large temperature range of -55 °C to +125 °C and it is housed in an hermetic Ceramic Flat-16 package. Ceramic Flat-16 The upper metallic lid is electrically connected to ground Table 1. Device summary Reference SMD pin Quality level Package Lead finish Mass EPPL(1) 1. EPPL = ESA preferred part list Temp. range RHFLVDS32AK1 - Engineering model Ceramic Flat-16 Gold - - -55 °C to 125 °C RHFLVDS32AK01V 5962F98652 QML-V Flight Target www.st.com |
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