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L6751BTR Datasheet(PDF) 5 Page - STMicroelectronics |
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L6751BTR Datasheet(HTML) 5 Page - STMicroelectronics |
5 / 58 page L6751B List of figures Doc ID 024028 Rev 1 5/58 List of figures Figure 1. Typical 6-phase application circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Figure 2. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Figure 3. L6751B pin connections (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Figure 4. JMode: voltage positioning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Figure 5. Device initialization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 Figure 6. Voltage positioning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Figure 7. Current reading . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 Figure 8. SLESS startup: enabled (left) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 Figure 9. LSLESS startup: disabled (right) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 Figure 10. DVID optimization circuit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 Figure 11. Thermal monitor connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 Figure 12. Output current vs. switching frequency in PSK mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 Figure 13. Efficiency performance with and without enhancements (DPM, GDC). . . . . . . . . . . . . . . . 44 Figure 14. ROSC vs. FSW per phase (ROSC to GND - left; ROSC to 3.3 V - right) . . . . . . . . . . . . . . . . 45 Figure 15. Equivalent control loop. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46 Figure 16. Control loop bode diagram and fine tuning. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47 Figure 17. Device initialization: PMBus controlling Vout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53 Figure 18. L6751B VFQFPN68 8x8 mm drawing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56 |
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