SN65MLVD200A, SN65MLVD202A

SN65MLVD204A, SN65MLVD205A

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SLLS573D – DECEMBER 2003 – REVISED DECEMBER 2015

7.9 Switching Characteristics – Driver

over recommended operating conditions unless otherwise noted

PARAMETER

TEST CONDITIONS

MAX

UNIT

Propagation delay time, low-to-high-level output

2

2.5

3.5

ns

Propagation delay time, high-to-low-level output

2

2.5

3.5

ns

Differential output signal rise time

See Figure 17

2

2.6

3.2

ns

Differential output signal fall time

2

2.6

3.2

ns

30

150

ps

0.9

ns

2

3

ps

55

150

ps

Disable time, high-level-to-high-impedance output

4

7

ns

Disable time, low-level-to-high-impedance output

4

7

ns

See Figure 18

Enable time, high-impedance-to-high-level output

4

7

ns

Enable time, high-impedance-to-low-level output

4

7

ns

(1)

All typical values are at 25°C and with a 3.3-V supply voltage.

(2)

Part-to-part skew is defined as the difference in propagation delays between two devices that operate at the same V/T conditions.

(3)

Jitter is ensured by design and characterization. Stimulus jitter has been subtracted from the numbers.

(4)

(5)

(6)

7.10 Switching Characteristics – Receiver

over recommended operating conditions unless otherwise noted

PARAMETER

TEST CONDITIONS

MAX

UNIT

Propagation delay time, low-to-high-level output

2

3.6

6

ns

Propagation delay time, high-to-low-level output

2

3.6

6

ns

Output signal rise time

1

2.3

ns

Output signal fall time

1

2.3

ns

Type 1

100

300

ps

Type 2

300

500

ps

1

ns

4

7

ps

Type 1

200

700

ps

Type 2

225

800

ps

Disable time, high-level-to-high-impedance output

6

10

ns

Disable time, low-level-to-high-impedance output

6

10

ns

See Figure 23

Enable time, high-impedance-to-high-level output

10

15

ns

Enable time, high-impedance-to-low-level output

10

15

ns

(1)

All typical values are at 25°C and with a 3.3-V supply voltage.

(2)

Part-to-part skew is defined as the difference in propagation delays between two devices that operate at the same V/T conditions.

(3)

Jitter is ensured by design and characterization. Stimulus jitter has been subtracted from the numbers.

(4)

samples.

(5)

(6)

samples.

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