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SN65HVD485EDG4 Datasheet(PDF) 9 Page - Texas Instruments |
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SN65HVD485EDG4 Datasheet(HTML) 9 Page - Texas Instruments |
9 / 29 page IO VO VID Voltage Source IOS VO 50 Ω CL =50pF Signal Generator DE D 0Vor3V 0VifTestingAOutput 3VifTestingBOutput RL =110 Ω Output S1 tPZL tPLZ 0.5V DE Output 1.5V 1.5V 2.5V 3V 0V 5V VOL 5V A B 50 Ω CL =50pF Signal Generator DE D 0Vor3V 3VifTestingAOutput 0VifTestingBOutput A B RL =110 Ω Output S1 tPZH tPHZ 0.5V DE Output 1.5V 1.5V 2.5V 3V 0V VOH VOff 0 SN65HVD485E www.ti.com SLLS612E – JUNE 2004 – REVISED DECEMBER 2015 Parameter Measurement Information (continued) Test load capacitance includes probe and jig capacitance (unless otherwise specified). Signal generator characteristics: rise time and fall time <6 ns, pulse rate 100 kHz, 50% duty cycle. ZO = 50 Ω (unless otherwise specified). Figure 7. Driver Enable/Disable Test Circuit and Waveforms, High Output Figure 8. Driver Enable/Disable Test Circuit and Waveforms, Low Output Figure 9. Driver Short-Circuit Test Figure 10. Receiver Parameter Definitions Copyright © 2004–2015, Texas Instruments Incorporated Submit Documentation Feedback 9 Product Folder Links: SN65HVD485E |
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