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ADC12J4000NKE10 Datasheet(PDF) 1 Page - Texas Instruments |
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ADC12J4000NKE10 Datasheet(HTML) 1 Page - Texas Instruments |
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1 / 94 page  -100 -80 -60 -40 -20 0 0 500 1000 1500 2000 Frequency (MHz) C003 Product Folder Sample & Buy Technical Documents Tools & Software Support & Community ADC12J4000 SLAS989C – JANUARY 2014 – REVISED JULY 2015 ADC12J4000 12-Bit 4 GSPS ADC With Integrated DDC 1 Features 2 Applications 1 • Excellent Noise and Linearity up to and beyond • Wireless Infrastructure FIN = 3 GHz • RF-Sampling Software Defined Radio • Configurable DDC • Wideband Microwave Backhaul • Decimation Factors from 4 to 32 (Complex • Military Communications Baseband Out) • SIGINT • Usable Output Bandwidth of 800 MHz at • RADAR and LIDAR 4x Decimation and 4000 MSPS • DOCSIS / Cable Infrastructure • Usable Output Bandwidth of 100 MHz at • Test and Measurement 32x Decimation and 4000 MSPS • Bypass Mode for Full Nyquist Output Bandwidth 3 Description • Low Pin-Count JESD204B Subclass 1 Interface The ADC12J4000 device is a wideband sampling and • Automatically Optimized Output Lane Count digital tuning device. Texas Instruments' giga-sample analog-to-digital converter (ADC) technology enables • Embedded Low Latency Signal Range Indication a large block of frequency spectrum to be sampled • Low Power Consumption directly at RF. An integrated DDC (Digital Down • Key Specifications Converter) provides digital filtering and down- conversion. The selected frequency block is made – Max Sampling Rate: 4000 MSPS available on a JESD204B serial interface. Data is – Min Sampling Rate: 1000 MSPS output as baseband 15-bit complex information for – DDC Output Word Size: 15-Bit Complex (30 ease of downstream processing. Based on the digital bits total) down-converter (DDC) decimation and link output rate settings, this data is output on 1 to 5 lanes of the – Bypass Output Word Size: 12-Bit Offset Binary serial interface. – Noise Floor: −149 dBFS/Hz or −150.8 dBm/Hz A DDC bypass mode allows the full rate 12-bit raw – IMD3: −64 dBc (FIN = 2140 MHz ± 30 MHz at ADC data to also be output. This mode of operation −13 dBFS) requires 8 lanes of serial output. – FPBW (–3 dB): 3.2 GHz The ADC12J4000 device is available in a 68-pin – Peak NPR: 46 dB VQFN package. The device operates over the – Supply Voltages: 1.9 V and 1.2 V Industrial (–40°C ≤ TA ≤ 85°C) ambient temperature range. – Power Consumption – Bypass (4000 MSPS): 2 W Device Information(1) – Decimate by 10 (4000 MSPS): 2 W PART NUMBER PACKAGE BODY SIZE (NOM) – Power Down Mode: <50 mW ADC12J4000 VQFN (68) 10.00 mm × 10.00 mm (1) For all available packages, see the orderable addendum at the end of the datasheet. Bypass — Spectral Response ƒS = 4 GHz, FIN = 1897 MHz 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. |
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