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ADC12D1600CIUT Datasheet(PDF) 56 Page - Texas Instruments |
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ADC12D1600CIUT Datasheet(HTML) 56 Page - Texas Instruments |
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56 / 86 page  ADC12D1000, ADC12D1600 SNAS480N – MAY 2010 – REVISED AUGUST 2015 www.ti.com Table 14. Calibration Values Addr: 5h (0101b) POR state: XXXXh Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Name SS(15:0) POR X X X X X X X X X X X X X X X X Bits 15:0 SS(15:0): SPI Scan. When the ADC performs a self-calibration, the values for the calibration are stored in this register and may be read from/ written to it. Set SSC (Addr: 4h, Bit 7) to read/write. See Calibration Feature for more information. Table 15. Reserved Addr: 6h (0110b) POR state: 1C20h Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Name Res POR 0 0 0 1 1 1 0 0 0 0 1 0 0 0 0 0 Bits 15:0 Reserved. Must be set as shown. Table 16. Des Timing Adjust Addr: 7h (0111b) POR state: 8140h Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Name DTA(6:0) Res POR 1 0 0 0 0 0 0 1 0 1 0 0 0 0 0 0 Bits 15:9 DTA(6:0): DES Mode Timing Adjust. In the DES Mode, the time at which the falling edge sampling clock samples relative to the rising edge of the sampling clock may be adjusted; the automatic duty cycle correction continues to function. See Input Control and Adjust for more information. The nominal step size is 30fs. Bits 8:0 Reserved. Must be set as shown. Table 17. Reserved Addr: 8h (1000b) POR state: 0000h Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Name Res POR 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Bits 15:0 Reserved. Must be set as shown. Table 18. Reserved Addr: 9h (1001b) POR state: 0000h Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Name Res POR 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Bits 15:0 Reserved. Must be set as shown. 56 Submit Documentation Feedback Copyright © 2010–2015, Texas Instruments Incorporated Product Folder Links: ADC12D1000 ADC12D1600 |
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