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LAN9500A Datasheet(PDF) 30 Page - Microchip Technology

Part # LAN9500A
Description  LAN950x USB 2.0 to 10/100 Ethernet Controller
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

LAN9500A Datasheet(HTML) 30 Page - Microchip Technology

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LAN950x
DS00001875A-page 30
 2010 - 2015 Microchip Technology Inc.
5.3.1.3
Endpoint 3 (Interrupt)
The Interrupt endpoint is responsible for indicating device status at each polling interval. The Interrupt endpoint is imple-
mented via the CTL module. When the endpoint is accessed, the Interrupt packet specified in Table 5-2 is presented to
the Host.
If there is no interrupt status to report, the device responds with a NAK.
The interrupt status can be cleared by writing to Interrupt Status Register (INT_STS) on page 119.
5.3.1.4
Endpoint 0 (Control)
The Control endpoint is handled by the CTL (USB Control) module. The CTL module is responsible for handling USB
standard commands, as well as USB vendor commands. In order to support these commands, the CTL must compile
a variety of statistics and store the programmable portions of the USB descriptors. The supported USB commands can
be found in Section 5.3.2, "USB Standard Commands," on page 37.
5.3.1.5
USB Command Processing
The UDC is programmed to decode USB commands. After a standard command is decoded by the UDC, it may be
passed to the CTL for completion. The CTL is responsible for implementing the Get Descriptor and vendor commands.
In order to implement the Get Descriptor command for string descriptors, the CTL manages a 128x32 register file which
stores the string values for Language ID, Manufacturer ID, Product ID, Serial Number, Configuration, and Interface. The
RAM’s contents is initialized via the EEPROM, after a system reset occurs.
When the UDC decodes a Get Descriptor command, it will pass a pointer to the CTL. The CTL uses this pointer to deter-
mine what the command is and how to fill it.
TABLE 5-2:
INTERRUPT PACKET FORMAT
Bits
Description
31:20
RESERVED
19
MACRTO_INT
18
RX FIFO Has Frame. The RX FIFO has at least one complete Ethernet frame.
17
TXSTOP_INT
16
RXSTOP_INT
15
PHY_INT
14
TXE
13
TDFU
12
TDFO
11
RXDF_INT
10:0
GPIO_INT
Note:
The polling interval is static and set through the EEPROM. The Host can change the polling interval by
updating the contents of the EEPROM and resetting the part.
TABLE 5-3:
STRING DESCRIPTOR INDEX MAPPINGS
Index
String Name
0
Language ID
1
Manufacturer ID
2
Product ID
3
Serial Number
4
Configuration String
5
Interface String


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