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TSM9634F Datasheet(PDF) 3 Page - Silicon Laboratories |
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TSM9634F Datasheet(HTML) 3 Page - Silicon Laboratories |
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3 / 12 page  TSM9634F TSM9634F Rev. 1.0 Page 3 ELECTRICAL CHARACTERISTICS VRS+ = VRS- = 3.6V; VSENSE = (VRS+ - VRS-) = 0V; TA = -40°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C. See Note 1 PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS Supply Current (Note 2) ICC VRS+ = 5V, TA = +25°C 0.5 0.85 μA VRS+ = 5V, -40°C < TA < +85°C 1.1 VRS+ = 28V, TA = +25°C 1.1 1.8 VRS+ = 28V, -40°C < TA < +85°C 2.5 Common-Mode Input Range VCM Guaranteed by CMRR , -40°C < TA < +85°C 1.6 28 V Common-Mode Rejection Ratio CMRR 1.6V < VRS+ < 28V, -40°C < TA < +85°C 94 130 dB Input Offset Voltage (Note 3) VOS TA = +25°C 100 250 μV -40°C < TA < +85°C 300 Gain G 50 V/V Gain Error (Note 4) GE TA = +25°C ±0.1 ±0.5 % -40°C < TA < +85°C ±0.6 Output Resistance ROUT (Note 5) 7.0 10 13.2 k Ω OUT Low Voltage VOL Gain = 50 3 15 mV OUT High Voltage VOH VOH = VRS- - VOUT (Note 6) 0.1 0.2 V Note 1: All devices are 100% production tested at TA = +25°C. All temperature limits are guaranteed by product characterization. Note 2: Extrapolated to VOUT = 0. ICC is the total current into the RS+ and the RS- pins. Note 3: Input offset voltage VOS is extrapolated from VOUT with VSENSE set to 1mV. Note 4: Gain error is calculated by applying two values for VSENSE and then calculating the error of the actual slope vs. the ideal transfer characteristic: For GAIN = 50, the applied VSENSE is 10mV and 60mV. Note 5: The device is stable for any capacitive load at VOUT. Note 6: VOH is the voltage from VRS- to VOUT with VSENSE = 3.6V/GAIN. |
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