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DLP9500UVFLN Datasheet(PDF) 6 Page - Texas Instruments |
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DLP9500UVFLN Datasheet(HTML) 6 Page - Texas Instruments |
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6 / 54 page  DLP9500UV DLPS033B – NOVEMBER 2014 – REVISED JUNE 2015 www.ti.com Pin Functions (continued) PIN (1) TYPE DATA INTERNAL TRACE SIGNAL CLOCK DESCRIPTION (I/O/P) RATE (2) TERM(3) (MILS) NAME NO. Differentially D_BP(9) AG3 Input LVCMOS DDR DCLK_B 727.18 terminated – 100 Ω Differentially D_BP(10) AL9 Input LVCMOS DDR DCLK_B 461.02 terminated – 100 Ω Differentially D_BP(11) AD14 Input LVCMOS DDR DCLK_B 71.35 terminated – 100 Ω Input data bus B Differentially D_BP(12) AH16 Input LVCMOS DDR DCLK_B 197.69 terminated – 100 Ω (2x LVDS) Differentially D_BP(13) AF16 Input LVCMOS DDR DCLK_B 150.38 terminated – 100 Ω Differentially D_BP(14) AJ15 Input LVCMOS DDR DCLK_B 243.14 terminated – 100 Ω Differentially D_BP(15) AE17 Input LVCMOS DDR DCLK_B 113.36 terminated – 100 Ω DATA BUS C Differentially D_CN(0) B14 Input LVCMOS DDR DCLK_C 459.04 terminated – 100 Ω Differentially D_CN(1) E15 Input LVCMOS DDR DCLK_C 342.79 terminated – 100 Ω Differentially D_CN(2) A17 Input LVCMOS DDR DCLK_C 456.22 terminated – 100 Ω Differentially D_CN(3) G21 Input LVCMOS DDR DCLK_C 68.24 terminated – 100 Ω Differentially D_CN(4) B20 Input LVCMOS DDR DCLK_C 362.61 terminated – 100 Ω Differentially D_CN(5) F20 Input LVCMOS DDR DCLK_C 163.07 terminated – 100 Ω Differentially D_CN(6) D22 Input LVCMOS DDR DCLK_C 204.16 terminated – 100 Ω Differentially D_CN(7) G23 Input LVCMOS DDR DCLK_C 105.59 terminated – 100 Ω Differentially D_CN(8) B26 Input LVCMOS DDR DCLK_C 450.51 terminated – 100 Ω Differentially D_CN(9) F28 Input LVCMOS DDR DCLK_C 302.04 terminated – 100 Ω Differentially D_CN(10) C29 Input LVCMOS DDR DCLK_C 429.8 terminated – 100 Ω Input data bus C (2x LVDS) Differentially D_CN(11) G27 Input LVCMOS DDR DCLK_C 317.1 terminated – 100 Ω Differentially D_CN(12) D26 Input LVCMOS DDR DCLK_C 276.76 terminated – 100 Ω Differentially D_CN(13) H28 Input LVCMOS DDR DCLK_C 186.78 terminated – 100 Ω Differentially D_CN(14) E29 Input LVCMOS DDR DCLK_C 311.3 terminated – 100 Ω Differentially D_CN(15) J29 Input LVCMOS DDR DCLK_C 262.62 terminated – 100 Ω Differentially D_CP(0) B16 Input LVCMOS DDR DCLK_C 463.64 terminated – 100 Ω Differentially D_CP(1) E17 Input LVCMOS DDR DCLK_C 347.65 terminated – 100 Ω Differentially D_CP(2) A15 Input LVCMOS DDR DCLK_C 456.45 terminated – 100 Ω Differentially D_CP(3) H20 Input LVCMOS DDR DCLK_C 67.72 terminated – 100 Ω Differentially D_CP(4) B22 Input LVCMOS DDR DCLK_C 362.76 terminated – 100 Ω Differentially D_CP(5) F22 Input LVCMOS DDR DCLK_C 161.69 terminated – 100 Ω 6 Submit Documentation Feedback Copyright © 2014–2015, Texas Instruments Incorporated Product Folder Links: DLP9500UV |
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