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DLP5500 Datasheet(PDF) 7 Page - Texas Instruments

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Part # DLP5500
Description  0.55 XGA Series
Download  46 Pages
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

DLP5500 Datasheet(HTML) 7 Page - Texas Instruments

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DLP5500
www.ti.com
DLPS013F – APRIL 2010 – REVISED MAY 2015
8 Specifications
8.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)
(1)
MIN
MAX
UNIT
ELECTRICAL
VCC
Voltage applied to VCC
(2) (3)
–0.5
4
V
VCCI
Voltage applied to VCCI
(2) (3)
–0.5
4
V
Delta supply voltage |VCC – VCCI|
(4)
0.3
V
Maximum differential voltage, Damage can occur to internal resistor if exceeded,
|VID|
700
mV
See Figure 6
VCC2
Voltage applied to VOFFSET
(2) (3) (4)
–0.5
8
V
VMBRST
Voltage applied to MBRST[0:15] Input Pins
–28
28
V
Voltage applied to all other pins(2)
–0.5
VCC + 0.3
V
Current required from a high-level
IOH
VOH = 2.4 V
–20
mA
output
Current required from a low-level
IOL
VOL = 0.4 V
15
mA
output
ENVIRONMENTAL
Case temperature: operational (5) (6)
–20
90
ºC
TCASE
Case temperature: non–operational (6)
–40
90
ºC
Dew Point (Operating and non-Operating)
81
ºC
(1)
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2)
All voltages referenced to VSS (ground).
(3)
Voltages VCC, VCCI, and VCC2 are required for proper DMD operation.
(4)
Exceeding the recommended allowable absolute voltage difference between VCC and VCCI may result in excess current draw. The
difference between VCC and VCCI, | VCC - VCCI|, should be less than .3V.
(5)
Exposure of the DMD simultaneously to any combination of the maximum operating conditions for case temperature, differential
temperature, or illumination power density (see Recommended Operating Conditions).
(6)
DMD Temperature is the worst-case of any test point shown in Figure 15, or the active array as calculated by the Micromirror Array
Temperature Calculation.
8.2 Storage Conditions
applicable before the DMD is installed in the final product
MIN
MAX
UNIT
Tstg
DMD storage temperature
–40
80
°C
Storage Dew Point - long-term (1)
24
TDP
Storage dew point
°C
Storage Dew Point - short-term (2)
28
(1)
Long-term is defined as the usable life of the device.
(2)
Dew points beyond the specified long-term dew point are for short-term conditions only, where short-term is defined as less than 60
cumulative days over the usable life of the device (operating, non-operating, or storage).
8.3 ESD Ratings
VALUE
UNIT
Electrostatic discharge immunity for LVCMOS [I/O] pins(1)
±2000
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all other
±2000
V(ESD)
Electrostatic discharge
V
pins [power, control pins] except MBRST (2)
Electrostatic discharge immunity for MBRST[0:15] pins(1)
<250
(1)
Tested in accordance with JESD22-A114-B Electrostatic Discharge (ESD) sensitivity testing Human Body Model (HBM).
(2)
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
Copyright © 2010–2015, Texas Instruments Incorporated
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