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DLP3010FQK Datasheet(PDF) 6 Page - Texas Instruments |
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DLP3010FQK Datasheet(HTML) 6 Page - Texas Instruments |
6 / 39 page DLP3010 DLPS051A – SEPTEMBER 2014 – REVISED APRIL 2015 www.ti.com 6 Specifications 6.1 Absolute Maximum Ratings See (1) MIN MAX UNIT Supply voltage for LVCMOS core logic(2) VDD –0.5 2.3 V Supply voltage for LPSDR low speed interface VDDI Supply voltage for SubLVDS receivers(2) –0.5 2.3 V Supply voltage for HVCMOS and micromirror VOFFSET –0.5 11 V electrode(2)(3) Supply voltage VBIAS Supply voltage for micromirror electrode(2) –0.5 19 V VRESET Supply voltage for micromirror electrode(2) –15 0.3 V | VDDI–VDD | Supply voltage delta (absolute value)(4) 0.3 V | VBIAS–VOFFSET | Supply voltage delta (absolute value)(5) 11 V | VBIAS–VRESET | Supply voltage delta (absolute value)(6) 34 V Input voltage for other inputs LPSDR(2) –0.5 VDD + 0.5 V Input voltage Input voltage for other inputs SubLVDS (2)(7) –0.5 VDDI + 0.5 V | VID | SubLVDS input differential voltage (absolute value)(7) 810 mV Input pins IID SubLVDS input differential current 10 mA ƒclock Clock frequency for low speed interface LS_CLK 130 MHz Clock frequency ƒclock Clock frequency for high speed interface DCLK 560 MHz Temperature – operational (8) –20 90 °C TARRAY and TWINDOW Temperature – non-operational(8) –40 90 °C Environmental TDP Dew Point - operating and non-operating 81 °C Absolute Temperature delta between any point on the |TDELTA| 30 °C window edge and the ceramic test point TP1(9) (1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device is not implied at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure above or below the Recommended Operating Conditions for extended periods may affect device reliability. (2) All voltage values are with respect to the ground terminals (VSS). The following power supplies are all required to operate the DMD: VSS, VDD, VDDI, VOFFSET, VBIAS, and VRESET. (3) VOFFSET supply transients must fall within specified voltages. (4) Exceeding the recommended allowable absolute voltage difference between VDDI and VDD may result in excessive current draw. (5) Exceeding the recommended allowable absolute voltage difference between VBIAS and VOFFSET may result in excessive current draw. (6) Exceeding the recommended allowable absolute voltage difference between VBIAS and VRESET may result in excessive current draw. (7) This maximum input voltage rating applies when each input of a differential pair is at the same voltage potential. Sub-LVDS differential inputs must not exceed the specified limit or damage may result to the internal termination resistors. (8) The highest temperature of the active array (as calculated by the Micromirror Array Temperature Calculation) or of any point along the Window Edge as defined in Figure 18. The locations of thermal test points TP2 and TP3 in Figure 18 are intended to measure the highest window edge temperature. If a particular application causes another point on the window edge to be at a higher temperature, that point should be used. (9) Temperature delta is the highest difference between the ceramic test point 1 (TP1) and anywhere on the window edge as shown in Figure 18. The window test points TP2 and TP3 shown in Figure 18 are intended to result in the worst case delta. If a particular application causes another point on the window edge to result in a larger delta temperature, that point should be used. 6.2 Storage Conditions applicable before the DMD is installed in the final product. MIN MAX UNIT Tstg DMD storage temperature -40 85 °C Storage dew point - long-term(1) 24 °C TDP Storage dew point - short-term(2) 28 °C (1) Long-term is defined as the usable life of the device. (2) Dew points beyond the specified long-term dew point are for short-term conditions only, where short-term is defined as less than 60 cumulative days over the usable life of the device (operating, non-operating, or storage). 6 Submit Documentation Feedback Copyright © 2014–2015, Texas Instruments Incorporated Product Folder Links: DLP3010 |
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