 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
SI4704-D50 Datasheet(PDF) 10 Page - Silicon Laboratories |
|
||||||||||||||||||||||||||||||
SI4704-D50 Datasheet(HTML) 10 Page - Silicon Laboratories |
|
|
10 / 34 page  Si4704/05-D50 10 Rev. 1.0 Figure 6. Digital Audio Interface Timing Parameters, I2S Mode Table 7. Digital Audio Interface Characteristics (VA = 2.7 to 5.5 V, VD = 1.62 to 3.6 V, TA = –20 to 85 °C) Parameter Symbol Test Condition Min Typ Max Unit DCLK Cycle Time tDCT 26 — 1000 ns DCLK Pulse Width High tDCH 10 — — ns DCLK Pulse Width Low tDCL 10 — — ns DFS Setup Time to DCLK Rising Edge tSU:DFS 5— — ns DFS Hold Time from DCLK Rising Edge tHD:DFS 5— — ns DOUT Propagation Delay from DCLK Falling Edge tPD:DOUT 0— 12 ns DCLK DFS tDCT tPD:OUT tSU:DFS tHD:DFS DOUT tDCH tDCL |
Similar Part No. - SI4704-D50 |
|
Similar Description - SI4704-D50 |
|
|
Link URL |
| Privacy Policy |
| ALLDATASHEET.COM |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Datasheet Upload | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
