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LMK00338RTAR Datasheet(PDF) 18 Page - Texas Instruments |
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LMK00338RTAR Datasheet(HTML) 18 Page - Texas Instruments |
18 / 33 page CLKoutX CLKoutX* HCSL Receiver 50:Traces HCSL Driver Rs Rs LMK00338 SNAS636A – DECEMBER 2013 – REVISED OCTOBER 2014 www.ti.com Typical Applications (continued) Electrical Characteristics provides crystal interface specifications with conditions that ensure start-up of the crystal, but it does not specify crystal power dissipation. The designer will need to ensure the crystal power dissipation does not exceed the maximum drive level specified by the crystal manufacturer. Overdriving the crystal can cause premature aging, frequency shift, and eventual failure. Drive level should be held at a sufficient level necessary to start-up and maintain steady-state operation. The power dissipated in the crystal, PXTAL, can be computed by: PXTAL = IRMS 2 * R ESR*(1 + C0/CL) 2 where • IRMS is the RMS current through the crystal. • RESR is the max. equivalent series resistance specified for the crystal • CL is the load capacitance specified for the crystal • C0 is the min. shunt capacitance specified for the crystal (4) IRMS can be measured using a current probe (for example, Tektronix CT-6 or equivalent) placed on the leg of the crystal connected to OSCout with the oscillation circuit active. As shown in Figure 19, an external resistor, RLIM, can be used to limit the crystal drive level, if necessary. If the power dissipated in the selected crystal is higher than the drive level specified for the crystal with RLIM shorted, then a larger resistor value is mandatory to avoid overdriving the crystal. However, if the power dissipated in the crystal is less than the drive level with RLIM shorted, then a zero value for RLIM can be used. As a starting point, a suggested value for RLIM is 1.5 kΩ. 9.2.2 Detailed Design Procedure 9.2.2.1 Termination and Use of Clock Drivers When terminating clock drivers keep in mind these guidelines for optimum phase noise and jitter performance: • Transmission line theory should be followed for good impedance matching to prevent reflections. • Clock drivers should be presented with the proper loads. – HCSL drivers are switched current outputs and require a DC path to ground via 50 Ω termination. • Receivers should be presented with a signal biased to their specified DC bias level (common mode voltage) for proper operation. Some receivers have self-biasing inputs that automatically bias to the proper voltage level; in this case, the signal should normally be AC coupled. 9.2.2.2 Termination for DC Coupled Differential Operation For DC coupled operation of an HCSL driver, terminate with 50 Ω to ground near the driver output as shown in Figure 20. Series resistors, Rs, may be used to limit overshoot due to the fast transient current. Because HCSL drivers require a DC path to ground, AC coupling is not allowed between the output drivers and the 50 Ω termination resistors. Figure 20. HCSL Operation, DC Coupling 18 Submit Documentation Feedback Copyright © 2013–2014, Texas Instruments Incorporated Product Folder Links: LMK00338 |
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