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CDCM6208V1FRGZR Datasheet(PDF) 79 Page - Texas Instruments

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Part # CDCM6208V1FRGZR
Description  2:8 Clock Generator, Jitter Cleaner with Fractional Dividers
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

CDCM6208V1FRGZR Datasheet(HTML) 79 Page - Texas Instruments

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PICe phy
DSP with receiver input
termination and self-
biasing
5
5
4
4
3
3
2
2
1
1
D
D
C
B
B
A
A
01
CDCM6208 Reference Schematic (Extra: output termination)
December, 2011
Title
Rev
Date:
Sheet
of
1uF
0
1uF
49.9
49.9
0
Y4-7_HCSL_P
Y4-7_HCSL_N
Y0-7 LVDS_P
PCIe_PHY_N
PCIe_PHY_P
HCSL connection example (DC coupled)
Outputs 4 to 7 have option for HCSL, LVCMOS, LPCML
For HCSL, install 50 ohm termination resistors and adjust
series resistor between 0 and 33 ohms to improve ringing.
TX-line 50Ö
RS(P)
RS(N)
TX-line 50Ö
Diff_in_N
Diff_in_P
LVDS or LVPECL connection example (AC coupled)
TX-line 50Ö
TX-line 50Ö
Y0-7 LVDS_N
DSP without receiver
input termination and
self-biasing
1uF
1uF
Y0-7 LVDS_P
Diff_in_N
Diff_in_P
LVDS or LVPECL connection example (AC coupled)
TX-line 50Ö
TX-line 50Ö
Y0-7 LVDS_N
49.9
Vbias
100n
49.9
extra
CDCM6208V1F
www.ti.com
SCAS943 – MAY 2015
Figure 64. Schematic Page 4
Copyright © 2015, Texas Instruments Incorporated
Submit Documentation Feedback
79
Product Folder Links: CDCM6208V1F


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