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CDCM6208V1FRGZR Datasheet(PDF) 76 Page - Texas Instruments

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Part No. CDCM6208V1FRGZR
Description  2:8 Clock Generator, Jitter Cleaner with Fractional Dividers
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

CDCM6208V1FRGZR Datasheet(HTML) 76 Page - Texas Instruments

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01
CDCM6208 Reference Schematic
1
3
December, 2011
Title
Rev
Date:
Sheet
of
DNI
C308
1uF
C291
0.1uF
0.1uF
C303
0.1uF
C286
1uF
0.1uF
C279
0.1uF
C274
0.1uF
C82
10uF/6.3V
C275
1uF
DNI
0.1uF
C305
1uF
C295
0.1uF
DNI
C300
1uF
C285
0.1uF
C284
0.1uF
U1
SI_MODE0
1
SDI/SDA/PIN1
2
SDO/AD0/PIN2
3
SCS/AD1/PIN3
4
SCL/PIN4
5
REF_SEL
6
VDD_PRI_REF
7
PRI_REFP
8
PRI_REFN
9
VDD_SEC_REF
10
SEC_REFP
11
SEC_REFN
12
Y4_N
25
Y4_P
26
VDD_Y4
27
Y5_N
28
Y5_P
29
VDD_Y5
30
VDD_Y6
31
Y6_P
32
Y6_N
33
VDD_Y7
34
Y7_P
35
Y7_N
36
CDCM6208
C282
1uF
DNI
C307
0.1uF
0.1uF
DNI
DNI
0.1uF
L1
BLM15HD102SN1D
1
2
C298
0.1uF
C304
0.1uF
C302
1uF
C281
10uF
C287
0.1uF
C280
0.1uF
C288
0.1uF
C292
0.1uF
C290
0.1uF
C289
0.1uF
C293
1uF
C277
1uF
C276
1uF
DNI
DNI
0.1uF
0.1uF
C301
0.1uF
C299
0.1uF
C283
100pF
DNI
DNI
0.1uF
VDD_OUT01
DVDD
VDD_PLL_A
VDD_OUT7
VDD_SEC_IN
VDD_PRI_IN
VDD_OUT6
VDD_OUT5
VDD_OUT4
REG_CAP
VDD_PLL
RESET_PWR
VDD_OUT23
VDD_OUT4
VDD_OUT5
VDD_OUT6
VDD_OUT7
VDD_PRI_IN
VDD_SEC_IN
DVDD
DVDD
DVDD
DVDD
DVDD
DSP_CLK7P
DSP_CLK7N
DSP_CLK6P
DSP_CLK6N
DSP_CLK5N
DSP_CLK5P
DSP_CLK4N
DSP_CLK4P
REF_SEL
SCL_PIN4
SCS_AD1_PIN3
SDO_AD0_PIN2
SDI_SDA_PIN1
SI_MODE0
PRI_REFP
PRI_REFN
SEC_REFP
SEC_REFN
STATUS1_PIN0
SDI_SDA_PIN1
SDO_AD0_PIN2
SCS_AD1_PIN3
SCL_PIN4
Place 10uF close to
device pin to minimize
series resistance
General Power supply related note:
Place all 0.1uF bypass caps as close as possible to device pins.
Device Reset can connect to
power monitor or left unconnected;
pin has internal 150k pullup
PWR_MONITOR
CDCM6208V1F
SCAS943 – MAY 2015
www.ti.com
13.2.1 Reference Schematic
Figure 61. Schematic Page 1
76
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Copyright © 2015, Texas Instruments Incorporated
Product Folder Links: CDCM6208V1F


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