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CDCM6208V1FRGZR Datasheet(PDF) 43 Page - Texas Instruments

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Part No. CDCM6208V1FRGZR
Description  2:8 Clock Generator, Jitter Cleaner with Fractional Dividers
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

CDCM6208V1FRGZR Datasheet(HTML) 43 Page - Texas Instruments

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CDCM6208V1F
www.ti.com
SCAS943 – MAY 2015
Register Maps (continued)
Table 11. Register 0
BIT
BIT NAME
RELATED BLOCK
DESCRIPTION/FUNCTION
15:10
RESERVED
These bits must be set to 0
PLL Internal Loop Filter Capacitor (C3) Selection
000
→ 35 pF
001
→ 112.5 pF
010
→ 177.5 pF
PLL Internal Loop Filter
9:7
LF_C3[2:0]
011
→ 242.5 pF
(C3)
100
→ 310 pF
101
→ 377.5 pF
110
→ 445 pF
111
→ 562.5 pF
PLL Internal Loop Filter Resistor (R3) Selection
000
→ 10 Ω
001
→ 30 Ω
010
→ 60 Ω
PLL Internal Loop Filter
6:4
LF_R3[2:0]
011
→ 100 Ω
(R3)
100
→ 530 Ω
101
→ 1050 Ω
110
→ 2080 Ω
111
→ 4010 Ω
PLL Charge Pump Current Setting
000
→ 500 µA
001
→ 1.0 mA
010
→ 1.5 mA
3:1
PLL_ICP[2:0]
PLL Charge Pump
011
→ 2.0 mA
100
→ 2.5 mA
101
→ 3.0 mA
110
→ 3.5 mA
111
→ 4.0 mA
This bit is tied to zero statically, and it is recommended to set to 0
0
RESERVED
when writing to register.
Table 12. Register 1
BIT
BIT NAME
RELATED BLOCK
DESCRIPTION/FUNCTION
PLL Reference 14-b Divider Selection
15:2
PLL_REFDIV[13:0]
PLL Reference Divider
(Divider value is register value +1)
1:0
PLL_FBDIV1[9:8]
PLL Feedback Divider 1
PLL Feedback 10-b Divider Selection, Bits 9:8
Table 13. Register 2
BIT
BIT NAME
RELATED BLOCK
DESCRIPTION/FUNCTION
PLL Feedback 10-b Divider Selection, Bits 7:0
15:8
PLL_FBDIV1[7:0]
PLL Feedback Divider 1
(Divider value is register value +1)
PLL Feedback 8-b Divider Selection
7:0
PLL_FBDIV0[7:0]
PLL Feedback Divider 0
(Divider value is register value +1)
Copyright © 2015, Texas Instruments Incorporated
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Product Folder Links: CDCM6208V1F


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