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CDCM6208V1FRGZR Datasheet(PDF) 30 Page - Texas Instruments

Part No. CDCM6208V1FRGZR
Description  2:8 Clock Generator, Jitter Cleaner with Fractional Dividers
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

CDCM6208V1FRGZR Datasheet(HTML) 30 Page - Texas Instruments

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10GbE
CDCM6208
Synthesizer
Mode
4x10G Ethernet ASIC
10G
PHY
10G
PHY
10G
PHY
10G
PHY
DDR
1G
PHY
PCIe
10G
PHY
DPLL
CDCM6208V1F
SCAS943 – MAY 2015
www.ti.com
Figure 27. Typical Use Case: CDCM6208V1F Example in Wireless Infrastructure Baseband Application
10.4 Device Functional Modes
10.4.1 Control Pins Definition
In the absence of a host interface, the CDCM6208V1F can be powered up in one of 32 pre-configured settings
when the pins are SI_MODE[1:0] = 10. The CDCM6208V1F has 5 control pins identified to achieve commonly
used networking frequencies, and change output types. The Smart Input MUX for the PLL is set in most
configurations to manual mode in pin mode. Based on the control pins settings for the on-chip PLL, the device
generates the appropriate frequencies and appropriate output signaling types at start-up. In the case of the PLL
loop filter, "JC" denotes PLL bandwidths of
≤ 1 kHz and "Synth" denotes PLL bandwidths of ≥ 100 kHz.
30
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Copyright © 2015, Texas Instruments Incorporated
Product Folder Links: CDCM6208V1F


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