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CDCLVP2108 Datasheet(PDF) 14 Page - Texas Instruments

Part # CDCLVP2108
Description  16-LVPECL Output, High-Performance Clock Buffer
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

CDCLVP2108 Datasheet(HTML) 14 Page - Texas Instruments

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LVPECL
8
8
2
Reference
Generator
GND
GND
OUTP[15...8]
OUTN[15...8]
LVPECL
8
8
OUTP[7...0]
OUTN[7...0]
V
CC
V
AC_REF[1, 0]
V
CC
V
CC
V
CC
V
CC
V
CC
INP0
INN0
INP1
INN1
CDCLVP2108
SCAS878C – MAY 2009 – REVISED JANUARY 2016
www.ti.com
8 Detailed Description
8.1 Overview
The CDCLVP2108 is an open emitter for LVPECL outputs. Therefore, proper biasing and termination are
required to ensure correct operation of the device and to minimize signal integrity. The proper termination for
LVPECL outputs is a 50
Ω to (VCC – 2) V, but this direct-coupled (DC) voltage is not readily available on PCB.
Therefore, a Thevenin equivalent circuit is worked out for the LVPECL termination in both DC- and AC-coupled
configurations. These configurations are shown in Figure 12 (a and b) for VCC= 2.5 V and Figure 13 (a and b) for
VCC = 3.3 V, respectively. TI recommends placing all resistive components close to either the driver end or the
receiver end. If the supply voltage for the driver and receiver is different, AC coupling is required.
8.2 Functional Block Diagram
8.3 Feature Description
The CDCLVP2108 is a low additive jitter universal to LVPECL fan-out buffer with two independent inputs. The
small package, low output skew, and low additive jitter make for a flexible device in demanding applications.
8.4 Device Functional Modes
The two independent inputs of the CDCLVP2108 distribute the input clock to eight outputs each. Unused inputs
and outputs can be left floating to reduce overall component cost. Both AC and DC coupling schemes can be
used with the CDCLVP2108 to provide greater system flexibility.
8.4.1 LVPECL Output Termination
The CDCLVP2108 is an open emitter for LVPECL outputs. Therefore, proper biasing and termination are
required to ensure correct operation of the device and to minimize signal integrity. The proper termination for
LVPECL outputs is 50
Ω to (VCC – 2) V, but this DC voltage is not readily available on PCB. Therefore, a
Thevenin equivalent circuit is worked out for the LVPECL termination in both direct-coupled (DC) and AC-
coupled configurations. These configurations are shown in Figure 12 a and b for VCC = 2.5 V and Figure 13 a
and b for VCC = 3.3 V, respectively. TI recommends placing all resistive components close to either the driver
end or the receiver end. If the supply voltage for the driver and receiver is different, AC coupling is required.
14
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Copyright © 2009–2016, Texas Instruments Incorporated
Product Folder Links: CDCLVP2108


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