CDCLVP2104

SCAS889B – OCTOBER 2009 – REVISED JANUARY 2016

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6.4 Thermal Information

CDCLVP2104

RHD (VQFN)

UNIT

24 PINS

Junction-to-ambient thermal resistance

0 LFM

35.6

°C/W

Junction-to-case (top) thermal resistance

30

°C/W

Junction-to-board thermal resistance

12

°C/W

Junction-to-top characterization parameter

0.5

°C/W

Junction-to-board characterization parameter

11.4

°C/W

Junction-to-case (bottom) thermal resistance

6.12

°C/W

(4)

Junction-to-pad thermal resistance

6.12

°C/W

(1)

For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application

report (SPRA953).

(2)

The package thermal resistance is calculated in accordance with JESD 51 and JEDEC 2S2P (high-K board).

(3)

Connected to GND with 16 thermal vias (0.3-mm diameter).

(4)

package.

(1)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

Input frequency

200

MHz

External threshold voltage applied to

Input threshold voltage

1.1

1.8

V

complementary input

Input high voltage

V

Input low voltage

0

V

Input high current

40

μA

Input low current

–40

μA

ΔV/ΔT

Input edge rate

20% to 80%

1.5

V/ns

Input capacitance

5

pF

(1)

Figure 5 and Figure 6 show DC test setup.

(1)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

Input frequency

Clock input

2000

MHz

0.1

1.5

V

Differential input peak-peak voltage

1.5 GHz

0.2

1.5

V

Input common-mode level

1

V

Input high current

40

μA

Input low current

–40

μA

ΔV/ΔT

Input edge rate

20% to 80%

1.5

V/ns

Input capacitance

5

pF

(1)

Figure 7 and Figure 8 show DC test setup. Figure 9 shows AC test setup.

6

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