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CDCL1810 Datasheet(PDF) 5 Page - Texas Instruments

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Part # CDCL1810
Description  Output, High-Performance Clock Distributor
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

CDCL1810 Datasheet(HTML) 5 Page - Texas Instruments

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CDCL1810
www.ti.com
SLLS781D – FEBRUARY 2007 – REVISED NOVEMBER 2014
Pin Functions
PIN
TYPE
DESCRIPTION
NAME
PIN NO.
8, 11, 14, 17,
20, 23, 26,
VDD
Power
1.8-V digital power supply.
29, 32, 35,
38, 41
AVDD
2, 5, 44, 47
Power
1.8-V analog power supply.
Exposed
VSS
thermal pad
Power
Ground reference.
and pin 12
1, 13, 45, 46,
NC
I
Not connected; leave open.
48
Differential LVDS input. Single-ended 1.8-V input can be dc-coupled to pin 3 with pin 4 either tied
CLKP, CLKN
3, 4
I
to pin 3 (recommended) or left open.
YP0, YN0
6, 7
YP1, YN1
9, 10
YP2, YN2
15, 16
YP3, YN3
18, 19
YP4, YN4
21, 22
O
10 differential CML outputs.
YP5, YN5
27, 28
YP6, YN6
30, 31
YP7, YN7
33, 34
YP8, YN8
40, 39
YP9, YN9
43, 42
SCL serial clock pin. SCL tolerated 1.8V on the input only. Open drain. Always connect to a pull-
SCL
24
I
up resistor.
SDA bidirectional serial data pin. SDA tolerates 1.8 V on the input only.Open drain. Always
SDA
25
I/O
connect to a pull-up resistor.
Configurable least significant bits (ADD[1:0]) of the SDA/SCL device address. The fixed most
ADD1, ADD0
37, 36
I
significant bits (ADD[6:2]) of the 7-bit device address are 11010.
Copyright © 2007–2014, Texas Instruments Incorporated
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