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CDCE62005 Datasheet(PDF) 2 Page - Texas Instruments

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Part # CDCE62005
Description  3:5 Clock Generator
Download  85 Pages
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

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CDCE62005
SCAS862F – NOVEMBER 2008 – REVISED JANUARY 2015
www.ti.com
Table of Contents
8.3
Feature Description................................................. 20
1
Features .................................................................. 1
8.4
Device Functional Modes........................................ 52
2
Applications ........................................................... 1
8.5
Programming........................................................... 55
3
Description ............................................................. 1
8.6
Register Maps ......................................................... 61
4
Revision History..................................................... 2
9
Application and Implementation ........................ 70
5
Pin Configuration and Functions ......................... 4
9.1
Application Information............................................ 70
6
Specifications......................................................... 6
9.2
Typical Application .................................................. 70
6.1
Absolute Maximum Ratings ...................................... 6
10
Power Supply Recommendations ..................... 74
6.2
Handling Ratings....................................................... 6
11
Layout................................................................... 76
6.3
Thermal Information .................................................. 6
11.1
Layout Guidelines ................................................. 76
6.4
Electrical Characteristics........................................... 7
11.2
Layout Example .................................................... 76
6.5
Timing Requirements .............................................. 11
12
Device and Documentation Support ................. 77
6.6
SPI Bus Timing Characteristics .............................. 11
12.1
Trademarks ........................................................... 77
6.7
Typical Characteristics ............................................ 12
12.2
Documentation Support ........................................ 77
7
Parameter Measurement Information ................ 13
12.3
Electrostatic Discharge Caution ............................ 77
8
Detailed Description ............................................ 14
12.4
Glossary ................................................................ 77
8.1
Overview ................................................................. 14
13
Mechanical, Packaging, and Orderable
8.2
Functional Block Diagrams ..................................... 14
Information ........................................................... 77
4 Revision History
Changes from Revision E (July 2014) to Revision F
Page
Added Low Noise Clock Generator: 550 fs rms typical (10 kHz to 20 MHz Integration Bandwidth), FC = 100 MHz in
Features section ..................................................................................................................................................................... 1
Added Low Noise Jitter Cleaner: 2.6 ps rms typical (10 kHz to 20 MHz Integration Bandwidth), FC = 100 MHz in
Features section ..................................................................................................................................................................... 1
Changes from Revision D (April 2011) to Revision E
Page
Changed Added, updated, or revised the following sections: Features; Application and Implementation; Power
Supply Recommendations ; Layout ; Device and Documentation Support ; Mechanical, Packaging, and Ordering
Information ............................................................................................................................................................................. 1
Changed Bit Name from LOCKW(3) to LOCKW(2).............................................................................................................. 48
Changed Bit Name from LOCKW(2) to LOCKW(1).............................................................................................................. 48
Changed Bit Name from LOCKW(1) to LOCKW(0).............................................................................................................. 48
Changed REGISTER.BIT from 5.26 to 5.25, from 5.25 to 5.24, from 5.24 to 5.23, from 5.23 to 5.22. .............................. 48
Changes from Revision C (February, 2010) to Revision D
Page
Changed 0 to 1 in SPI_LE description ................................................................................................................................... 4
Changed last sentence in Description column of Pin 46 and Pin 2 ....................................................................................... 5
Changed Outputs to Output 1 in PLVCMOS Test Conditions, changed PD to Power_Down in LVCMOS INPUT MODE,
and deleted (LVCMOS signals) from Input capacitance in Electrical Characteristics ............................................................ 7
Changed TIMING REQUIREMENTS table........................................................................................................................... 11
Added 1 row to TIMING Requirements table - Input Clock Slew Rate... ............................................................................. 11
Added SPI CONTROL INTERFACE TIMING section .......................................................................................................... 11
Changed Functional Block Diagrams .................................................................................................................................. 14
Changed pin names in Figure 11 ......................................................................................................................................... 15
Changed Feedback Divider value in Figure 15 .................................................................................................................... 18
Changed are 25°C to (nominal conditions) in Table 3 ......................................................................................................... 21
2
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