SI53325 datasheet(10/27 Pages) SILABS

Part #	SI53325

Description	DUAL 1:5 LOW JITTER LVPECL CLOCK BUFFER

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Manufacturer	SILABS [Silicon Laboratories]

Direct Link	http://www.silabs.com

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Si53325

10

Rev. 1.0

2.3. Output Clock Termination Options

The recommended output clock termination options are shown below. Unused outputs should be left unconnected.

Figure 6. LVPECL Output Termination

Si533xx

R1

VDDO

R2

R1

R2

50

LVPECL

Receiver

VTERM = VDDO – 2V

R1 // R2 = 50 Ohm

Q

Qn

= 3.3V or 2.5V

VDDO

3.3V LVPECL:

R1 = 127 Ohm, R2 = 82.5 Ohm

2.5V LVPECL:

R1 = 250 Ohm, R2 = 62.5 Ohm

DC Coupled LVPECL Termination Scheme 1

VDD = VDDO

Si533xx

50

LVPECL

Receiver

VTERM = VDDO – 2V

Q

Qn

= 3.3V or 2.5V

VDDO

50

VDD = VDDO

DC Coupled LVPECL Termination Scheme 2

Si533xx

R1

VDDO

R2

R1

R2

50

VBIAS = VDD – 1.3V

R1 // R2 = 50 Ohm

Rb

0.1 uF

AC Coupled LVPECL Termination Scheme 1

Q

Qn

0.1 uF

= 3.3V or 2.5V

VDDO

LVPECL

Receiver

= 3.3V or 2.5V

VDD

3.3V LVPECL:

R1 = 82.5 Ohm, R2 = 127 Ohm, Rb = 120 Ohm

2.5V LVPECL:

R1 = 62.5 Ohm, R2 = 250 Ohm, Rb = 90 Ohm

Si533xx

50

Rb

0.1 uF

AC Coupled LVPECL Termination Scheme 2

Q

Qn

0.1 uF

= 3.3V or 2.5V

VDDO

LVPECL

Receiver

= 3.3V or 2.5V

VDD

50

3.3V LVPECL:

Rb = 120 Ohm

2.5V LVPECL:

Rb = 90 Ohm

VBIAS = VDD – 1.3 V

50

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