TRF372017

SLWS224E – AUGUST 2010 – REVISED JANUARY 2016

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Table of Contents

7.4

Device Functional Modes........................................ 33

1

Features .................................................................. 1

7.5

Register Maps ......................................................... 34

2

Applications ........................................................... 1

8

Application and Implementation ........................ 46

3

Description ............................................................. 1

8.1

Application Information............................................ 46

4

Revision History..................................................... 2

8.2

Typical Application ................................................. 46

5

Pin Configuration and Functions ......................... 3

9

Power Supply Recommendations ...................... 50

6

Specifications......................................................... 5

10

Layout................................................................... 51

6.1

Absolute Maximum Ratings ...................................... 5

10.1

Layout Guidelines ................................................. 51

6.2

Recommended Operating Conditions ....................... 5

10.2

Layout Example .................................................... 51

6.3

Thermal Information .................................................. 5

11

Device and Documentation Support ................. 52

6.4

Electrical Characteristics........................................... 6

11.1

Device Support...................................................... 52

6.5

Timing Requirements - SPI: Writing Phase .............. 8

11.2

Community Resources.......................................... 52

6.6

Timing Requirements - SPI: Read-Back Phase........ 8

11.3

Trademarks ........................................................... 52

6.7

Typical Characteristics ............................................ 10

11.4

Electrostatic Discharge Caution ............................ 52

7

Detailed Description ............................................ 23

11.5

Glossary ................................................................ 52

7.1

Overview ................................................................. 23

12

Mechanical, Packaging, and Orderable

7.2

Functional Block Diagram ....................................... 23

Information ........................................................... 52

7.3

Feature Description................................................. 23

4 Revision History

NOTE: Page numbers for previous revisions may differ from page numbers in the current version.

Changes from Revision D (September 2013) to Revision E

Page

•

Added Feature Description section, Device Functional Modes section, Application and Implementation section,

Power Supply Recommendations section, Layout section, Device and Documentation Support section, and

Mechanical, Packaging, and Orderable Information section .................................................................................................. 1

Changes from Revision C (May 2012) to Revision D

Page

•

Changed text string from Reg 1, B[30..28] = [000] to Reg 0, B[30..28] = [000] in the Description column associated

with RB_REG<0>, RB_REG<1>, and RB_REG<2> ............................................................................................................ 44

Changes from Revision B (March 2012) to Revision C

Page

•

Added graph titles to Figure 56 and 57 that were missing in Revision B............................................................................. 17

Changes from Revision A (August 2010) to Revision B

Page

•

Deleted Comments column from Table 1 ............................................................................................................................... 8

•

Changed Figures 12 through Figure 27 ............................................................................................................................... 10

•

Changed the text under Integer and Fractional Mode Selection through Practical Limit on Maximum PFD Frequency. .... 23

•

Changed RDIV = 20 to RDIV = 2 in Setup Example for Fractional Mode............................................................................ 26

•

Changed Recommended Value of EN_LD_ISOURCE from 1 to 0 in Table 1..................................................................... 27

•

Changed column heading from Default Value to Reset Value in register tables 1, 2, 3, 4, 5, 6, and 7............................... 34

•

Added recommended programming [xx] to various Description statements in register tables 2, 5, 6, and 7. ..................... 37

•

Changed Register 4, Bit21/Bit22 Description statement from Off to Normal. ...................................................................... 39

•

Changed Column heading from Default Value to Reset Value in Readback mode section, Register 0.............................. 43

•

Changed Bit5 name from CHIP_ID to CHIP_ID _0 and changed Bit6 name from NU to CHIP_ID_1, Reset Value to 1.... 44

•

Changed image in Figure 87. .............................................................................................................................................. 48

•

Changed the text in the Application Layout, and added link to Figure 95............................................................................ 51

2

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