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AN611 Datasheet(PDF) 2 Page - Silicon Laboratories
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AN611 Datasheet(HTML) 2 Page - Silicon Laboratories
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1.1. Gate Driver Circuits
While the timing generator (U1, Figure 1) has a maximum VDD of 3.3 V, many applications will have a VIN of 4.5 V
to 5.5 V dc; therefore, the gate drivers must provide a 0 to VIN output swing from a maximum input signal of 3.3 V.
To meet this criterion, the discrete gate driver circuits use a bootstrap circuit to level-shift driver output swing.
Referring to Figure 2, when the MCU output is low, high-side transistor Q1 is on, and bootstrap capacitor C4
charges to approximately (VIN – 0.7 V). When the MCU output transitions high, Q1 base is driven by Vboot (i.e.
Vboot = MCU Vout + VIN –0.7 V ~ 7.6 V assuming VIN = 5.0 V, MCU Vout = 3.3 V, waveform “A”, Figure 2). This
high-voltage swing abruptly turns high-side transistor Q1 off and low-side transistor Q2 on. Note the low-side RC
circuit (C5, R2) provides “speed-up” for Q2 (Channel 2, Figure 2).
Figure 2. Bootstrap Driver Operation
The resistor, R3, helps to provide a path for pre-charging the bootstrap capacitor, C4, as well as to provide dc bias
for transistor Q1. It also helps to keep the base of transistor pulled high till the microcontroller starts switching.
The value of R3 should be chosen based on minimum turn-on time (or minimum duty-cycle) of the high-side switch
so that there is enough time to discharge the capacitor to bring the voltage at the base of transistor, Q1, to its
normal value before the next switching cycle begins.
The capacitor, C4, is chosen such that the dynamic current due to change in voltage across it multiplied by the hFE
of transistor Q1 should be able to charge the gate capacitor of transistor Q3 to turn it on within a short time. The
base-emitter reverse bias voltage of the transistor, Q1, should not exceed vendor specifications. To prevent the
base-emitter voltage from exceeding specified maximum limits during transients, use of a diode clamp between
base and emitter with the anode of the diode connected to the transistor base and the cathode to the emitter is
recommended. Any change in system operating frequency must also compensate the values of the RC circuits at
the base of the high-side drive transistor and low-side drive MOSFET. Failure to do this can cause cross-
conduction, which can lower efficiency or destroy the converter.
For best results, the layout files included in the ISOvolt Reference Design should be used. Any circuit modifications
should adhere to these layout guidelines:
The driver layout should be as tight as possible to minimize inductance.
The driver output should be located as close to the switching transistor and transformer pads as possible to
minimize inductive ringing.
Gate Driver 1
Gate Driver 2
CH2: Q2 Gate
XFMR High Side
XFMR Low Side
Q1 Base (2x V
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