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54ACQ573 Datasheet(PDF) 2 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
Part No. 54ACQ573
Description  Quiet Series Octal Latch with TRI-STATE Outputs
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Maker  NSC [National Semiconductor (TI)]
Homepage  http://www.national.com
Logo NSC - National Semiconductor (TI)

54ACQ573 Datasheet(HTML) 2 Page - National Semiconductor (TI)

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Connection Diagrams
Functional Description
The ’ACQ/’ACTQ573 contains eight D-type latches with
TRI-STATE output buffers. When the Latch Enable (LE) in-
put is HIGH, data on the D
n inputs enters the latches. In this
condition the latches are transparent, i.e., a latch output will
change state each time its D input changes. When LE is
LOW the latches store the information that was present on
the D inputs a setup time preceding the HIGH-to-LOW tran-
sition of LE. The TRI-STATE buffers are controlled by the
Output Enable (OE) input. When OE is LOW, the buffers are
enabled. When OE is HIGH the buffers are in the high im-
pedance mode but this does not interfere with entering new
data into the latches.
Truth Table
Inputs
Outputs
OE
LE
D
O
n
LH
H
H
LH
L
L
LL
X
O
0
HX
X
Z
H = HIGH Voltage
L = LOW Voltage
Z = High Impedance
X = Immaterial
O0 = Previous O0 before HIGH-to-LOW transition of Latch Enable
Logic Diagram
Pin Assignment for DIP
and Flatpak
DS100242-3
Pin Assignment for LCC
DS100242-4
DS100242-5
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
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