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PCM2707CPJT Datasheet(PDF) 6 Page - Texas Instruments |
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PCM2707CPJT Datasheet(HTML) 6 Page - Texas Instruments |
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6 / 47 page  PGND V CCP HOST FUNC3 FUNC0 HID0/MS HID1/MC HID2/MD V BUS D+ D - V DD DGND FUNC1 FUNC2 DOUT 1 2 3 4 5 6 7 8 24 23 22 21 20 19 18 17 32 9 31 10 30 11 29 12 28 13 27 14 26 15 25 16 PCM2704C, PCM2705C, PCM2706C, PCM2707C SBFS036B – MAY 2015 – REVISED AUGUST 2015 www.ti.com PCM2706C, PCM2707C PJT Package 32-Pin TQFP Top View Pin Functions: PJT Package (PCM2706C/PCM2707C) PIN DESCRIPTION NAME NO. I/O AGNDL 26 — Analog ground for headphone amplifier of L-channel AGNDR 31 — Analog ground for headphone amplifier of R-channel CK 14 O Clock output for external ROM (PCM2706C). Must be left open (PCM2707C). D+ 23 I/O USB differential input/output plus(1) D– 22 I/O USB differential input/output minus(1) DGND 20 — Digital ground DOUT 17 O S/PDIF output/I2S data output DT 15 I/O Data input/output for external ROM (PCM2706C). Must be left open with pullup resistor (PCM2707C). (1) FSEL 9 I Function select (low: I2S data output, high: S/PDIF output)(2) FUNC0 5 I/O HID key state input (next track), active high (FSEL = 1). I2S LR clock output (FSEL = 0).(3) FUNC1 19 I/O HID key state input (previous track), active high (FSEL = 1). I2S bit clock output (FSEL = 0).(3) FUNC2 18 I/O HID key state input (stop), active high (FSEL = 1). I2S system clock output (FSEL = 0).(3) FUNC3 4 I HID key state input (play/pause), active high (FSEL = 1). I2S data input (FSEL = 0).(3) HID0/MS 6 I HID key state input (mute), active high (PCM2706C). MS input (PCM2707C). (3) HID1/MC 7 I HID key state input (volume up), active high (PCM2706C). MC input (PCM2707C). (3) HID2/MD 8 I HID key state input (volume down), active high (PCM2706C). MD input (PCM2707C).(3) Host detection during self-powered operation (connect to VBUS). Max power select during bus-powered HOST 3 I operation. (low: 100 mA, high: 500 mA).(4) PGND 1 — Analog ground for DAC, OSC, and PLL PSEL 16 I Power source select (low: self-power, high: bus-power)(1) SSPND 11 O Suspend flag, active low (low: suspend, high: operational) TEST 10 I Test pin. Must be set high(1) (1) LV-TTL level (2) LV-TTL level. (3) LV-TTL level with internal pulldown (4) LV-TTL level, 5-V tolerant 6 Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: PCM2704C PCM2705C PCM2706C PCM2707C |
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