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DIX4192IPFBR Datasheet(PDF) 1 Page - Texas Instruments |
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DIX4192IPFBR Datasheet(HTML) 1 Page - Texas Instruments |
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1 / 69 page  S/PDIF IN DIX4192 DSP x4 S/PDIF OUT PCM x1 GPO/INT I2C x1 PCM5242 PCM x1 TPA6120A2 Product Folder Sample & Buy Technical Documents Tools & Software Support & Community DIX4192 SBFS031D – JANUARY 2006 – REVISED JANUARY 2016 DIX4192 Integrated Digital Audio Interface Receiver and Transmitter 1 Features • Small TQFP-48 Package, Compatible With the SRC4382 and SRC4392 1 • Digital Audio Interface Transmitter (DIT) – Supports Sampling Rates Up to 216 kHz 2 Applications – Includes Differential Line Driver and • Digital Audio Recorders and Mixing Desks CMOS-Buffered Outputs • Digital Audio Interfaces for Computers – Block-Sized Data Buffers for Both Channel • Digital Audio Routers and Distribution Systems Status and User Data • Broadcast Studio Equipment – Status Registers and Interrupt Generation for • DVD and CD Recorders Flag and Error Conditions • Surround Sound Decoders and A/V Receivers • Digital Audio Interface Receiver (DIR) • Car Audio Systems – PLL Lock Range Includes Sampling Rates from 20 kHz to 216 kHz 3 Description – Includes Four Differential-Input Line Receivers The DIX4192 device is a highly-integrated CMOS and an Input Multiplexer device designed for use in professional and – Bypass Multiplexer Routes Line Receiver broadcast digital audio systems. The DIX4192 Outputs to Line Driver and Buffer Outputs combines a digital audio interface receiver (DIR) and – Block-Sized Data Buffers for Both Channel transmitter (DIT), two audio serial ports, and flexible distribution logic for interconnection of the function Status and User Data block data and clocks. – Automatic Detection of Non-PCM Audio Streams (DTS CD/LD and IEC 61937 formats) The DIR and DIT are compatible with the AES3, S/PDIF, IEC 60958, and EIAJ CP-1201 interface – Audio CD Q-Channel Sub-Code Decoding and standards. The audio serial ports and DIT may be Data Buffer operated at sampling rates up to 216 kHz. The DIR – Status Registers and Interrupt Generation for lock range includes sampling rates from 20 kHz to Flag and Error Conditions 216 kHz. – Low Jitter Recovered Clock Output Device Information(1) • User-Selectable Serial Host Interface: SPI™ or PART NUMBER PACKAGE BODY SIZE (NOM) I2C DIX4192 TQFP (48) 7.00 mm × 7.00 mm – Provides Access to On-Chip Registers and Data Buffers (1) For all available packages, see the orderable addendum at the end of the data sheet. • Two Audio Serial Ports (Ports A and B) – Synchronous Serial Interface to External DIX4192 Typical Application Signal Processors, Data Converters, and Logic – Slave or Master Mode Operation With Sampling Rates Up to 216 kHz – Supports Left-Justified, Right-Justified, and Philips I2S™ Data Formats – Supports Audio Data Word Lengths Up to 24 Bits • Four General-Purpose Digital Outputs – Multifunction Programmable Through Control Registers • Extensive Power-Down Support – Functional Blocks May Be Disabled Individually When Not In Use • Operates From 1.8-V Core and 3.3-V I/O Power Supplies 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. |
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