LMP8480, LMP8481

SNVS829C – MARCH 1999 – REVISED SEPTEMBER 2015

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8 Detailed Description

8.1 Overview

The LMP8480 and LMP8481 are single-supply, high-side current sense amplifiers with available fixed gains of

x20, x60 and x100. The power supply range is 4.5 V to 76 V, while the common-mode input voltage range is

capable of 4.0-V to 76-V operation. The supply voltage and common-mode range are completely independent of

each other. This makes the LMP848x supply voltage extremely flexible, as the LMP848x's supply voltage can be

greater than, equal to, or less than the load source voltage, and allowing the device to be powered from the

system supply or the load supply voltage.

The LMP8480 and LMP8481 supply voltage does not have to be larger than the load source voltage. A 76-V load

source voltage with a 5-V supply voltage is perfectly acceptable.

8.1.1 Theory of Operation

The LMP8480 and LMP8481 are comprised of two main stages. The first stage is a differential input current to

voltage converter, followed by a differential voltage amplifier and level-shifting output stage. Also present is an

internal 14 Volt Low-Dropout Regulator (LDO) to power the amplifiers and output stage, as well as a reference

divider resistor string to allow the setting of the reference level.

Internally, the voltage on each input pin is converted to a current by the internal precision thin-film input resistors

the input common-mode voltage for internal use by the differential amplifier.

differential current. The differential amplifier then servos the resistor currents through the MOSFETs to maintain

a zero balance across the differential amplifier inputs.

to correct this current imbalance, and the extra current required to balance the input currents is then reflected

down into the two lower 400-k

Ω “tail” resistors. The difference in the currents into the tail resistors is therefore

same current, then provide voltage gain by changing the current into a proportionally larger voltage. The gain of

The differential amplifier stage then samples the voltage difference across the two 400-k

Ω tail resistors and also

The resulting output of the amplifier will be equal to the differential input voltage times the gain of the device, plus

any voltage value applied to the two VREF pins.

The resistor values in the schematic are ideal values for clarity and understanding. Table 1 shows the actual

values used that account for parallel combinations and loading. This table can be used for calculating the effects

of any additional external resistance.

Table 1. Actual Internal Resistor Values

Differential Amp FB

Gain Option

(each)

(each)

(each)

(each)

(each)

20x

98.38 k

491.9 k

393.52 k

1967.6 k

98.38 k

60x

32.793 k

172.165 k

393.52 k

1967.6 k

98.38 k

100x

19.676 k

98.38 k

393.52 k

1967.6 k

98.38 k

10

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