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ATMEGA16-16MC Datasheet(PDF) 79 Page - ATMEL Corporation

Part No. ATMEGA16-16MC
Description  8-bit AVR Microcontroller with 16K Bytes In-System Programmable Flash
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Maker  ATMEL [ATMEL Corporation]
Homepage  http://www.atmel.com
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ATMEGA16-16MC Datasheet(HTML) 79 Page - ATMEL Corporation

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79
ATmega16(L)
2466E–AVR–10/02
Note:
1. A special case occurs when OCR0 equals TOP and COM01 is set. In this case, the
compare match is ignored, but the set or clear is done at TOP. See “Phase Correct
PWM Mode” on page 74 for more details.
• Bit 2:0 – CS02:0: Clock Select
The three Clock Select bits select the clock source to be used by the Timer/Counter.
If external pin modes are used for the Timer/Counter0, transitions on the T0 pin will
clock the counter even if the pin is configured as an output. This feature allows software
control of the counting.
Timer/Counter Register –
TCNT0
The Timer/Counter Register gives direct access, both for read and write operations, to
the Timer/Counter unit 8-bit counter. Writing to the TCNT0 Register blocks (removes)
the compare match on the following timer clock. Modifying the counter (TCNT0) while
the counter is running, introduces a risk of missing a compare match between TCNT0
and the OCR0 Register.
Table 41. Compare Output Mode, Phase Correct PWM Mode(1)
COM01
COM00
Description
0
0
Normal port operation, OC0 disconnected.
01
Reserved
1
0
Clear OC0 on compare match when up-counting. Set OC0 on compare
match when downcounting.
1
1
Set OC0 on compare match when up-counting. Clear OC0 on compare
match when downcounting.
Table 42. Clock Select Bit Description
CS02
CS01
CS00
Description
0
0
0
No clock source (Timer/Counter stopped).
001
clkI/O/(No prescaling)
010
clk
I/O/8 (From prescaler)
011
clk
I/O/64 (From prescaler)
100
clkI/O/256 (From prescaler)
101
clk
I/O/1024 (From prescaler)
1
1
0
External clock source on T0 pin. Clock on falling edge.
1
1
1
External clock source on T0 pin. Clock on rising edge.
Bit
765
432
10
TCNT0[7:0]
TCNT0
Read/Write
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Initial Value
0
0
0
0
0
0
0
0


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