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ATMEGA16-16PC Datasheet(PDF) 22 Page - ATMEL Corporation |
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ATMEGA16-16PC Datasheet(HTML) 22 Page - ATMEL Corporation |
22 / 315 page 22 ATmega16(L) 2466E–AVR–10/02 System Clock and Clock Options Clock Systems and their Distribution Figure 11 presents the principal clock systems in the AVR and their distribution. All of the clocks need not be active at a given time. In order to reduce power consumption, the clocks to modules not being used can be halted by using different sleep modes, as described in “Power Management and Sleep Modes” on page 30. The clock systems are detailed Figure 11. Figure 11. Clock Distribution CPU Clock – clk CPU The CPU clock is routed to parts of the system concerned with operation of the AVR core. Examples of such modules are the General Purpose Register File, the Status Reg- ister and the data memory holding the Stack Pointer. Halting the CPU clock inhibits the core from performing general operations and calculations. I/O Clock – clk I/O The I/O clock is used by the majority of the I/O modules, like Timer/Counters, SPI, and USART. The I/O clock is also used by the External Interrupt module, but note that some external interrupts are detected by asynchronous logic, allowing such interrupts to be detected even if the I/O clock is halted. Also note that address recognition in the TWI module is carried out asynchronously when clk I/O is halted, enabling TWI address recep- tion in all sleep modes. Flash Clock – clk FLASH The Flash clock controls operation of the Flash interface. The Flash clock is usually active simultaneously with the CPU clock. General I/O Modules Asynchronous Timer/Counter ADC CPU Core RAM clk I/O clk ASY AVR Clock Control Unit clk CPU Flash and EEPROM clk FLASH clk ADC Source Clock Watchdog Timer Watchdog Oscillator Reset Logic Clock Multiplexer Watchdog Clock Calibrated RC Oscillator Timer/Counter Oscillator Crystal Oscillator Low-frequency Crystal Oscillator External RC Oscillator External Clock |
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