CM6903/4

2002/12/16

Champion Microelectronic Corporation

Page 7

PFC OUT (Pin 4) and PWM OUT (Pin3)

PFC OUT and PWM OUT are the high-current power driver

capable of directly driving the gate of a power MOSFET

with peak currents up to -1A and +0.5A. Both outputs are

actively held low when VCC is below the UVLO threshold

level which is 15V or VREFOK comparator is low.

GND (Pin 5)

GND is the return point for all circuits associated with this

part. Note: a high-quality, low impedance ground is critical

to the proper operation of the IC. High frequency grounding

techniques should be used.

ISENSE (Pin 6)

This pin ties to a resistor which senses the PFC input

current. This signal should be negative with respect to the

IC ground. It internally feeds the pulse-by-pulse current limit

comparator and the current sense feedback signal. The

ILIMIT trip level is –1V. The ISENSE feedback is internally

multiplied by a gain of four and compared against the

internal programmed ramp to set the PFC duty cycle. The

intersection of the boost inductor current downslope with

the internal programming ramp determines the boost

off-time.

It requires a RC filter between ISENSE and PFC boost

sensing resistor.

VEAO (Pin 7)

This is the PFC slew rate enhanced transconductance

amplifier output which needs to connected with a

compensation network.

VFB (Pin 8)

Besides this is the PFC slew rate enhanced

transconductance input, it also tie to a couple of protection

comparators, PFCOVP, and Tri-Fault Detect

IAC (pin 9)

Typically, it has a feedforward resistor, RAC, 100K~200K

ohm resistor connected between this pin and rectified line

input voltage.

This pin serves 2 purposes:

1.) During the startup condition, it supplies the startup

current; therefore, the system does not requires

additional bleed resistor to start up the chip.

2.) The current of RAC will program the automatic

slope compensation for the system. This

feedforward signal can increase the signal to noise

ratio for the light load condition or the high input

line voltage condition.

Power Factor Correction

Power factor correction makes a nonlinear load look like a

resistive load to the AC line. For a resistor, the current

drawn from the line is in phase with and proportional to the

line voltage, so the power factor is unity (one). A common

class of nonlinear load is the input of most power supplies,

which use a bridge rectifier and capacitive input filter fed

from the line. The peak-charging effect, which occurs on

the input filter capacitor in these supplies, causes brief

high-amplitude pulses of current to flow from the power line,

rather than a sinusoidal current in phase with the line

voltage. Such supplies present a power factor to the line of

less than one (i.e. they cause significant current harmonics of

the power line frequency to appear at their input). If the input

current drawn by such a supply (or any other nonlinear load)

can be made to follow the input voltage in instantaneous

amplitude, it will appear resistive to the AC line and a unity

power factor will be achieved.

To hold the input current draw of a device drawing power

from the AC line in phase with and proportional to the input

voltage, a way must be found to prevent that device from

loading the line except in proportion to the instantaneous line

voltage. The PFC section of the CM6903/4 uses a

boost-mode DC-DC converter to accomplish this. The input

to the converter is the full wave rectified AC line voltage. No

bulk filtering is applied following the bridge rectifier, so the

input voltage to the boost converter ranges (at twice line

frequency) from zero volts to the peak value of the AC input

and back to zero.

By forcing the boost converter to meet two simultaneous

conditions, it is possible to ensure that the current draws

from the power line matches the instantaneous line voltage.

One of these conditions is that the output voltage of the

boost converter must be set higher than the peak value of

the line voltage. A commonly used value is 385VFB, to allow

current that the converter is allowed to draw from the line at

any given instant must be proportional to the line voltage.

PFC Control: Leading Edge Modulation with Input

Current Shaping Technique

(I.C.S.T.)

The only differences between the conventional PFC control

topology and I.C.S.T. is:

the current loop of the conventional control method is a close

loop method and it requires a detail understanding about the

system loop gain to design. With I.C.S.T., since the current

loop is an open loop, it is very straightforward to implement it.

The end result of the any PFC system, the power supply is

like a pure resistor at low frequency. Therefore, current is in

phase with voltage.

In the conventional control, it forces the input current to

follow the input voltage. In CM6903, the chip thinks if a boost

converter needs to behave like a low frequency resistor, what

the duty cycle should be.

The following equations is CM6903 try to achieve:

in

in

e

I

V

R

=

(1)

in

l

I

I

=

(2)