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F1653 Datasheet(PDF) 4 Page - Integrated Device Technology

Part # F1653
Description  ZIF/CIF Modulator
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Manufacturer  IDT [Integrated Device Technology]
Direct Link  http://www.idt.com
Logo IDT - Integrated Device Technology

F1653 Datasheet(HTML) 4 Page - Integrated Device Technology

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ZIF/CIF Modulator
600MHz to 2900MHz
Zero-Distortion
TM Modulator
4
RevO, April 2015
IDTF1653NLGI
Datasheet
IDTF1653 SPECIFICATION
See application circuit. Typical values are measured at VDD = +3.3V, FLO = 1950 MHz, PLO = 0 dBm, TCASE=
+25°C, STBY = GND, BB_IQ frequency = 49, 50 MHz, BB_I&Q levels = 200 mVp-p each (-13dBm and 14 dB
backoff from 1V DAC compliance), I & Q = 0.250V common-mode bias unless otherwise noted.
Parameter
Symbol
Comment
min
typ
max
units
Logic Input High
VIH
For STBY Pin
1.07
V
Logic Input Low
VIL
For STBY Pin
0.68
V
Logic Current
IIH, IIL
For STBY Pin
-100
+1
μA
Supply Current (ON)
ISUPP
Total VDD
178
190
1
mA
Supply Current (STBY)
ISTBY
Total VDD, STBY = VIH
2.8
5
mA
LO Power
PLO
600MHz to 2900MHz
-3
+5
dBm
BB Input Resistance
(Differential)
RBB
Freq = 100 MHz
113
Ω
LO port Impedance
ZLO
 Single Ended (RL < -10dB)
Can be driven differentially
50
Ω
RF port Impedance
ZRF
Single Ended (RL < -10dB)
50
Ω
Power Gain
G
2.0
3.0
4.0
dB
Output IP3 @ 850 MHz
IP3O1
LO = 800 MHz
37
dBm
Output IP3 @ 2.00 GHz
IP3O2
LO = 1950 MHz
30
36
Output IP3 @ 2.85 GHz
IP3O3
LO = 2800 MHz
31
Output IP2 @ 850 MHz
IP2O1
LO = 800 MHz
Differential baseband input
65
dBm
Output IP2 @ 2.00 GHz
IP2O
LO = 1950 MHz
Differential baseband input
58
2
64
Output IP2 @ 2.85 GHz
IP3O2
LO = 2800 MHz
Differential baseband input
63
Turn on time
PON
STBY = low to 90% final
output power
175
nsec
Turn off time
POFF
STBY = high to initial output
power -30dB
26
LO (Carrier) Suppression
LOsupp
Native, Uncorrected
FLO = 1950 MHz
-39
-30
dBm
Sideband (Image) Suppression
SS
Native, Uncorrected
FLO = 1950 MHz
Differential baseband input
-34
-30
dBc
Output P1dB
P1dBO
Output Compression
15
dBm
Output Noise
NSD
 10 MHz offset from LO
 BB I&Q levels = 0 V
P-P
-157
-159
dBm/Hz
LO Path Noise (internal)
Φ
N_LO
+10 MHz offset
-161
dBc/Hz
SPECIFICATION NOTES:
1
– Items in min/max columns in bold italics are Guaranteed by Test
2
– All other Items in min/max columns are Guaranteed by Design Characterization


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