Electronic Components Datasheet Search |
|
SBT2 Datasheet(PDF) 11 Page - Panasonic Semiconductor |
|
SBT2 Datasheet(HTML) 11 Page - Panasonic Semiconductor |
11 / 30 page MN101EF93G 8-bit Single-chip Microcontroller Publication date: February 2015 11 PubNo. 21693-013E 1.3.3 Pin Functions Pins NO I/O Function Description VDD5 18 - Power connect pins Apply 4.0 V to 5.5 V to VDD5 and 0 V connect 0.1 F + 1 F or larger bypass capacitor for internal power stabilization. VSS 15 - VDD18 19 - Internal power output pin This pin is output 1.8 V from internal power circuit. Don’t use the power supply to external device. For internal power circuit output stability, connect at least 0.1 F + 1 F one bypass capacitor between VDD18 and VSS. OSC1 16 Input High speed operation clock input pin Connect these oscillation pins to ceramic or crystal ocsillators for high-frequency clock operation. If the clock is an external input, connect it to OSC1 and leave OSC2 open. The chip will not oper- ate with an external clock when using STOP mode. OSC2 17 Output High speed operation clock output pin NRST 12 I/O Reset pin [Active low] This pin resets the chip when power is turned on, is allocated as P27 and contains an internal pull-up resistor (Typ. 50 k ). Setting this pin low initialize the internal state of the device. Thereafter, setting the input to high releases the reset. The hardware waits for the system clock to stabilize, then processes the reset interrupt. If a capacitor is to be inserted between NRST and VSS, it is recom- mended that a discharge diode be placed between NRST and VDD5. ATRST 11 input Auto reset setting pin Input "High" to enable auto reset function and "Low” to disable this function P00 21 I/O I/O port 0 7-bit CMOS tri-state I/O port. Each bit can be set individually as either an input or output by P0DIR register. A pull-up resistor for each bit can be selected individually by P0PLU register. At reset, the input mode is selected and pull-up resistor is disabled (high impedance). P01 22 P02 23 P03 24 P04 25 P05 26 P06 27 P10 33 I/O I/O port 1 1-bit CMOS tri-state I/O port. It can be set as either an input or out- put by P1DIR register. A pull-up resistor can be selected by P1PLU register. At reset, the input mode is selected and pull-up resistor is disabled (high impedance). P20 28 I/O I/O port 2 7-bit CMOS tri-state I/O port. Each bit can be set individually as either an input or output by P2DIR register. A pull-up resistor for each bit can be selected individually by P2PLU register. At reset, the input mode is selected and pull-up resistor is disabled (high impedance) P21 29 P22 30 P23 31 P24 32 P25 16 P26 17 P27 12 input input port 2 P27 has an N-channel open-drain configuration. P33 34 I/O I/O port 3 3-bit CMOS tri-state I/O port. Each bit can be set individually as either an input or output by P3DIR register. A pull-up resistor for each bit can be selected individually by P3PLU register. At reset, the input mode is selected and pull-up resistor is disabled (high impedance). P34 35 P35 36 P43 37 I/O I/O port 4 5-bit CMOS tri-state I/O port. Each bit can be set individually as either an input or output by P4DIR register. A pull-up resistor for each bit can be selected individually by P4PLU register. At reset, the input mode is selected and pull-up resistor is disabled (high impedance). P44 38 P45 39 P46 40 P47 41 |
Similar Part No. - SBT2 |
|
Similar Description - SBT2 |
|
|
Link URL |
Privacy Policy |
ALLDATASHEET.COM |
Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Datasheet Upload | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |