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100325 Datasheet(PDF) 1 Page - National Semiconductor (TI) |
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100325 Datasheet(HTML) 1 Page - National Semiconductor (TI) |
1 / 8 page 100325 Low Power Hex ECL-to-TTL Translator General Description The 100325 is a hex translator for converting F100K logic levels to TTL logic levels. Differential inputs allow each circuit to be used as an inverting, non-inverting or differential re- ceiver. An internal reference voltage generator provides V BB for single-ended operation, or for use in Schmitt trigger appli- cations. All inputs have 50 k Ω pull-down resistors. When the inputs are either unconnected or at the same potential the outputs will go low. When used in single-ended operation the apparent input threshold of the true inputs is 20 mV to 40 mV higher (posi- tive) than the threshold of the complementary inputs. The V EE and VTTL power may be applied in either order. Features n Pin/function compatible with 100125 n Meets 100125 AC specifications n 50% power reduction of the 100125 n Differential inputs with built in offset n Standard FAST® outputs n 2000V ESD protection n −4.2V to −5.7V operating range n Available to Microcircuit Drawing (SMD) 5962-9153101 Logic Diagram Pin Names Description D 0–D5 Data Inputs D 0–D5 Inverting Data Inputs Q 0–Q5 Data Outputs FAST® is a registered trademark of Fairchild Semiconductor. DS100314-4 August 1998 © 1998 National Semiconductor Corporation DS100314 www.national.com |
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