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SC14046B Datasheet(PDF) 1 Page - ON Semiconductor |
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SC14046B Datasheet(HTML) 1 Page - ON Semiconductor |
1 / 7 page © Semiconductor Components Industries, LLC, 2008 August, 2008 − Rev. 0 1 Publication Order Number: SC14046B/D SC14046B Phase Locked Loop The SC14046B phase locked loop contains two phase comparators, a voltage−controlled oscillator (VCO), source follower, and zener diode. The comparators have two common signal inputs, PCAin and PCBin. Input PCAin can be used directly coupled to large voltage signals, or indirectly coupled (with a series capacitor) to small voltage signals. The self−bias circuit adjusts small voltage signals in the linear region of the amplifier. Phase comparator 1 (an exclusive OR gate) provides a digital error signal PC1out, and maintains 90° phase shift at the center frequency between PCAin and PCBin signals (both at 50% duty cycle). Phase comparator 2 (with leading edge sensing logic) provides digital error signals, PC2out and LD, and maintains a 0° phase shift between PCAin and PCBin signals (duty cycle is immaterial). The linear VCO produces an output signal VCOout whose frequency is determined by the voltage of input VCOin and the capacitor and resistors connected to pins C1A, C1B, R1, and R2. The source−follower output SFout with an external resistor is used where the VCOin signal is needed but no loading can be tolerated. The inhibit input Inh, when high, disables the VCO and source follower to minimize standby power consumption. The zener diode can be used to assist in power supply regulation. Applications include FM and FSK modulation and demodulation, frequency synthesis and multiplication, frequency discrimination, tone decoding, data synchronization and conditioning, voltage−to−frequencyconversion and motor speed control. Features • Buffered Outputs Compatible with MHTL and Low−Power TTL • Diode Protection on All Inputs • Supply Voltage Range = 3.0 to 18 V • Pin−for−Pin Replacement for CD4046B • Phase Comparator 1 is an Exclusive OR Gate and is Duty Cycle Limited • Phase Comparator 2 Switches on Rising Edges and is not Duty Cycle Limited • Pb−Free Packages are Available* MAXIMUM RATINGS (Voltages Referenced to VSS) Symbol Parameter Value Unit VDD DC Supply Voltage Range −0.5 to +18.0 V Vin Input Voltage Range (All Inputs) −0.5 to VDD + 0.5 V Iin DC Input Current, per Pin ±10 mA PD Power Dissipation, per Package (Note 1) 500 mW TA Operating Temperature Range −55 to +125 °C Tstg Storage Temperature Range −65 to +150 °C Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. Temperature Derating: Plastic “DW” Packages: – 7.0 mW/_C From 65_C To 125_C http://onsemi.com MARKING DIAGRAM SOIC−16 DW SUFFIX CASE 751G A = Assembly Location WL = Wafer Lot YY = Year WW = Work Week G = Pb−Free Indicator See detailed ordering and shipping information in the package dimensions section on page 4 of this data sheet. ORDERING INFORMATION *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. 14046BG AWLYYWW This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid ap- plications of any voltage higher than maximum rated voltages to this high−impedance circuit. For proper op- eration, Vin and Vout should be constrained to the range VSS v (Vin or Vout) v VDD. Unused inputs must always be tied to an appropriate logic voltage level (e.g., either VSS or VDD). Unused out- puts must be left open. 16 1 |
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